Linux device drivers for RTL8211F-CG

[DFomi.1]

Hello. I'm working with STM32MP15-DK1. There is the Realtek IC: RTL8211F-CG. Driver for this IC situates in SDK: linux-5.10.10/drivers/net/phy/realtek.c

There are two defines in this file:

#define RTL8211F_TX_DELAY BIT(8)

#define RTL8211F_RX_DELAY BIT(3)

These defines are used in function: static int rtl8211f_config_init (struct phy_device *phydev)

There are 2 strings in this function:

ret = phy_modify_paged_changed (phydev, 0xd08, 0x11, RTL8211F_TX_DELAY, val_txdly);

ret = phy_modify_paged_changed (phydev, 0xd08, 0x15, RTL8211F_RX_DELAY, val_rxdly);

https://datasheet.lcsc.com/lcsc/1912111437_Realtek-Semicon-RTL8211F-CG_C187932.pdf

But in the datasheet we can see that there is no 0x11 address of the register on the 0xd08 page. And we can't change bit 3 in register 0x15 of page 0xd08 because it is OR bit.

My device operates correctly, but I think I don't understand how it operates. Please, help me realise it.

[PatrickF]

Hi,

as far as I understand from RTL8211F-CG datasheet (it is the PHY present on STM32MP157x-DK1/DK2 boards), the RX and TX delays are enabled by HW pins sampled during power on (pull up on respectively RXD0 and RXD1 pins of the PHY).

The driver is probably not accurate (i.e. they keep some legacy code), some PHYs have register controls, some PHYs have pin controls, some have both.

It probably not hurt to access such not existent bitfields (as it work).

Maybe try to remove those lines to see if timings/behavior are affected (might be hard to check).

You might try to ask Realtek support (if possible).

Regards.

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