Memory equalization - How are the traces measured?
I downloaded the STM32MP151AAC3 example model (.zip file) that routes traces to the DDR3L memory
Then I measured DDR_Q1 to DDR_7, DQM0, DQS0_P and DQS0_N and filled the Excel table that is included inside the downloaded .zip file.
Here is the result:
I have been using Altium CircuitMaker (very similar to Altium Designer).

I measured by first pressing CTRL+H and then mark one part of the track and then I press this button.

But when I look at the Excel spred sheet that ST have made, they show me these numbers.
My question is: What are ST doing to getting the length of DQ0, DQ1, DQ5 and DQ6 ? It seems that they are the only ones that differs. Others seems to be similar.
If they are changed in the model, but not in the Excel spred sheet, which values should I follow? The values made by ST, or the hard ware example model made by ST?

The reason why I'm asking this question is becuse the minimal clearance in the BGA for the DDR3L tracks, is 0.08mm. I need to re-route some tracks to increase the minimal electrical clearance.
