RPMSG SDB cached buffer

[mishuk]

We follow this: https://wiki.st.com/stm32mpu/wiki/How_to_exchange_large_data_buffers_with_the_coprocessor_-_principle and this: https://wiki.st.com/stm32mpu/wiki/How_to_exchange_large_data_buffers_with_the_coprocessor_-_example#Linux_drivers

articles for exchanging M4-A7 except for DMA : in our case we write from M4 directly into DDR without DMA transfer.

Every time A7 needs new portion of data, it sends request via rpmsg and polls on eventfd for ready data from M4. It works fine for a number of runs but very soon we get old data. We have checked buffers on M4 side and correctness of poll-read on A7 side. For me it looks like coherence issue. So, my question is : how can I mark mmaped region as non-cacheable area ?

PS. As far as I know linux UIO driver maps non-cached memory region, RPMSG SDB - not.

[ArnaudP]

Hello,

Do you try to use dma_alloc_coherent/dma_free_coherent instead of dma_alloc_wc/dma_free_wc in the rpmsg sdb driver?

For more information on DMA mapping APIs, you can refer to following documentation: https://www.kernel.org/doc/Documentation/DMA-API-HOWTO.txt

[mishuk]

Great ! It works !

Does it make sense for passing pgprot_noncached(vma->vm_page_prot)

instead of vma->vm_page_prot for the last parameter in remap_pfn_range() like it is done in UIO driver ?

[PatrickF]

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[ArnaudP]

Not enough expert to give you a definitive answer but seems that it would be the same for the stm32mp1 regarding the code:

https://elixir.bootlin.com/linux/latest/source/arch/arm/include/asm/pgtable-nommu.h#L56

That said, the uio driver is upstreamed so it makes sense to be inspired by it.