STM32MP1 support ...

[AvaTar]

I guess most have noticed the recent anouncement of the STM32MP1, a dual core unit with a Cortex A7 and a M4.

Hard data seem a bit scarce yet, though.

What toolchain will support this combo, and when ?

Does the mentioned STLink V3 support concurrent debugging of both cores ?

What about an evaluation hardware ?

And a Linux version ?

And what about the interest in dual-cores on customer's side, or is it just a case of # metoo ? ;)

[Uwe Bonnes]

There are datasheets, a reference manual and flyers for the disco and eval boards. That is a lot of hard data . Perhaps Embedded world starting tomorrow will show more things coming up.

[Olivier GALLIEN]

Yes lot of data already available on usual st.com product site, and I guess the new https://wiki.st.com/stm32mpu might answer most of your questions.

Olivier

[AvaTar]

Thank you, going to have look.

General experience teached me not to be a "very early adopter", though ... ;)

[Uwe Bonnes]

Cube just got an update.

[AvaTar]

Not sure if this will change my view on Cube. I'm currently not touching it with a 10 ft pole ...

And Cube is not yet to toolchain.

But you might be right, I expect some related presentations and announcements on the Embedded World.

I will not attend this year, though.

[Tesla DeLorean]

The STLink V3 can deal with multi-core parts.

Can you run two debugger instances and single step both, I don't know. Handling two concurrent cores would be something the .DLL should be able to handle/manage.

I see that kind of thing as "Desperate Measures", when all other better methods have failed.

>>And what about the interest in dual-cores on customer's side, or is it just a case of # metoo ? ;)

I suspect it is a check box item for some, but the utility is hard to gauge, it will complicate development significantly. It's exceedingly difficult, most devs have enough trouble getting their pants on one leg at a time.

[AvaTar]

> The STLink V3 can deal with multi-core parts.

That would be expected.

But application development & debugging would be complex and troublesome, yes.

The A7 core will usually run a fullblown OS (Linux), the M4 a bare-metal application. I would expect a toolchain/IDE to handle the different project environments properly. Code download from the A7 to the M4 at runtime ?

Assessing the current state of CubeMX, I would not make plans for a commercial MP1 project for now ...

> I suspect it is a check box item for some, but the utility is hard to gauge, ...

And I would be interested in Freescale's sales numbers of the VF7xx ...

[Amel NASRI]

>> And what about the interest in dual-cores on customer's side, or is it just a case of # metoo ? ;)

Just an example: @Community member​  and others expressed this need in 2017 wish-list ;)

[AvaTar]

2017 - that's a while ago. Actually, ages in this business.

Now surprise us with features and robustness.

And let's hope the Freescale VF7 did not fill the whole niche in the meantime ...

[After Forever]

I think the main competitor to beat is NXP's i.MX 6 and 7 series.

[AvaTar]

Reading the data brief for the MP1 discovery kit, some things struck me odd.

• 4-Gbit DDR3L, 16 bits, 533 MHz

Really, 16 bit ?

> Development toolchains ...

> Note: On Windows® only.

For a Linux environment ???

Should not be difficult to run an ARM toolchain on the target (A7), at least in console mode. I hope your OpenSTLinux distro includes one.

Any target tools to download executables from the Linux file system (A7) to the M4, and start them ?

[Olivier GALLIEN]

Hi,

> Development toolchains ...

> Note: On Windows® only.

Note is applicable only for IAR and KEIL toolchain adressing M4.

Of course Linux GCC toolchain require Linux host system.

SW4STM32 support the load and start of M4 from the Linux (A7) file system ( aka "Production mode" )

Olivier

[AvaTar]

> SW4STM32 support the load and start of M4 from the Linux (A7) file system ( aka "Production mode" )

I hope you don't imply running SW4STM32 (Eclipse) on the A7 core of the target ...

My idea - controlling a toolchain on the A7 core via cmd line, and push the generated executable into the M4 core by a tool running on the A7 core.

Such tools do exist for similar asymmetric dual-core systems, and would be easy to integrate into a make file approach.

Once I find the spare time, I need to read the reference manual, to see how the M4/A7 cores are tied together, and how they are supposed to communicate.