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Graduate II
January 31, 2024
Question

STM32MP135 - Baremetal - Ethernet2

  • January 31, 2024
  • 8 replies
  • 4983 views

Hello,

 

I would like to integrate ethernet2 in my bare-metal project. I am aware that not only eth2 pins have to be properly configured, but also a 10th pin of MCP IO expander. However, the eth2 seems to be disabled after all. I am doing the same configuration steps for eth1 and it simply works. The question is, what am I missing? Could it be PMIC?

 

Best,

J. Schneider

    This topic has been closed for replies.

    8 replies

    Technical Moderator
    February 5, 2024

    Hi @jschneider ,

    Sorry to come late in the thread. 

    Any update since then ? 

    Could you precise what you mean by "the eth2 seems to be disabled afterall" ? 

    Which test are you doing ? 

    Thx

    Olivier 

     

     

     

    Graduate II
    February 6, 2024

    Hello @Olivier GALLIEN ,

     

    I have been trying to make eth2 work, but it is still not enough. Nevertheless, I have made some progress.

    Here are my configuration steps:

    - Enable PMIC

    - Enable BSP to control nRST signal of eth2 

    - Configure GPIOs

    - Enable 50 MHz Clock in RMII mode

    The problem is:

    After enabling the clock, eth2 wakes up. In wireshark, I can see data being transferred and the interface's LED blink. The thing is, the visible data is an uncontrolled spam of bytes that does not stop.

    jschneider_0-1707203192784.png

    I am also getting an error in this section of code:

    jschneider_1-1707203361466.png

    The SWR bit is always 1, so the eth2 can't be reset.

     

    Additionally, I have used an osciloscope to measure all signals from the eth2 interface and the phy. After that, I would compare the results with eth2 working under OpenSTLinux. On the hardware side, I couldn't find a significant difference. The clocks were both 50 MHz, but their "waveforms" would be slightly different.

    I am eager to provide a more detailed explanation of every mentioned part.

     

    Best

    J. Schneider

    Graduate II
    February 6, 2024

    I have managed to make some progress.

    My clock was configured to 50 MHz, but after reading the frequency with an oscilloscope it was exactly more than 51 MHz. After configuring PLL4 to work with HSE instead of HSI, there is no byte spam anymore. 

    At the end, it didn't solve my problem. I am still receiving an error:

    jschneider_0-1707231949390.png

    I think there is something wrong with rcc and syscfg. 

    After using HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH2_RMII); I don't see Interrupts being activated (which are for eth1)

    jschneider_1-1707232112962.png

    I am invoking 

    __HAL_RCC_ETH2CK_CLK_ENABLE();

    __HAL_RCC_ETH2MAC_CLK_ENABLE();

    __HAL_RCC_ETH2TX_CLK_ENABLE();

    __HAL_RCC_ETH2RX_CLK_ENABLE();

    after GPIO configuration.

    Graduate II
    February 7, 2024

    I found the solution:

    jschneider_0-1707291552688.png

    With the bit being set, I could manage to get through the eth2 init function.

    Graduate II
    February 23, 2024

    Dear @jschneider ,

    I have also problem to create working project using ETH2. Are you able to publish sample project ?

    Best Regards

    Radim

    Graduate II
    February 26, 2024

    Hello @ravo ,

     

    I am sorry, but I can't do that.

    In the posts above there is enough help to activate the Ethernet 2.

     

    Best

    J. Schneider

    Graduate II
    February 26, 2024

    Dear @jschneider ,

    I understand you, but can you help me ?

    I just also add lines to init correct GPIOs, clock for ETH2 instance, Interrupt instance in function

    HAL_ETH_MspInit()

    When I debug project It freezes in app_netxduo.c on line tx_semaphore_create(&Semaphore, "DHCP Semaphore", 0); in MX_NetXDuo_Init

    Can you explain what you mean with "My clock was configured to 50 MHz, but after reading the frequency with an oscilloscope it was exactly more than 51 MHz. After configuring PLL4 to work with HSE instead of HSI, there is no byte spam anymore. "

    - Enable PMIC - did you do any changes here ?

    - Enable BSP to control nRST signal of eth2

    I just have:

    /* Configure ETH2_NRST pin */ // corrected 2024-02-23

    io_init_structure.Pin = MCP23x17_GPIO_PIN_10;

    io_init_structure.Pull = IO_NOPULL;

    io_init_structure.Mode = IO_MODE_OUTPUT_PP;

    BSP_IO_Init(0, &io_init_structure);

    BSP_IO_WritePin(0, MCP23x17_GPIO_PIN_10, IO_PIN_SET);

     

     

    Or do you have any modification ?

    - Configure GPIOs - I think I have this OK for all RXD,TXD, CRS_DV, TX_EN, ...

    - Enable 50 MHz Clock in RMII mode - I don't know where if I compare with project using ETH1 ?

    I have only put these lines to end of HAL_ETH_MspInit

    /* Enable Ethernet clocks */

    __HAL_RCC_ETH1CK_CLK_ENABLE();

    __HAL_RCC_ETH1MAC_CLK_ENABLE();

    __HAL_RCC_ETH1TX_CLK_ENABLE();

    __HAL_RCC_ETH1RX_CLK_ENABLE();

    Maybe I have some problem with clock settings or another bug...

    Best Regards and thanks in advance.

    Radim

     

    Graduate II
    February 27, 2024

    Dear @jschneider 

    thanks for information. I just verified once more

    1) I just used Nx_UDP_Echo_Client from Cube package STM32CubeMP13 STM32Cube_FW_MP13_V1.0.0\Projects\STM32MP135C-DK\Applications\NetXDuo

    (I have some problems with generate new bare metal project in STCube from stratch, I just reported to ST)

    2) in main.c in void MX_ETH_Init(void) I just changed heth.Instance = ETH2;

    heth.Instance = ETH2;

    MACAddr[0] = 0x00;

    MACAddr[1] = 0x80;

    MACAddr[2] = 0xE1;

    MACAddr[3] = 0x00;

    MACAddr[4] = 0x00;

    MACAddr[5] = 0x00;

    heth.Init.MACAddr = &MACAddr[0];

    heth.Init.MediaInterface = HAL_ETH_RMII_MODE;

    heth.Init.TxDesc = DMATxDscrTab;

    heth.Init.RxDesc = DMARxDscrTab;

    heth.Init.RxBuffLen = 1536;

     

    3) Select RMII mode for eth2. OK

    4. Make sure GPIO settings is correct

    I just use CubeMX to generate GPIO settings and copied all settings to 

    void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)

    and to void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)

    5. Adjust the clock configuration for eth2. It should use 50 MHz and probably configured with HSE.

    I don't know how to to this

    6. PMIC code verified and it is switching 3V3 for ETH2

    7. Activate the bsp pin (nRST eth2) also as part of HAL_ETH_MspInit function

    /* Configure ETH2_NRST pin */ // corrected 2024-02-23

    io_init_structure.Pin = MCP23x17_GPIO_PIN_10;

    io_init_structure.Pull = IO_NOPULL;

    io_init_structure.Mode = IO_MODE_OUTPUT_PP;

    BSP_IO_Init(0, &io_init_structure);

    BSP_IO_WritePin(0, MCP23x17_GPIO_PIN_10, IO_PIN_SET);

     

    8. Enabled clocks verified in HAL_ETH_MspInit

    9. magic bit already set as you suggest earlier SYSCFG->PMCSETR |= 1<<25

    10. Now it will hang in HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)

    stm32mp13xx_hal_eth.c

    /* Wait for software reset */
    while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
    {
    if (((HAL_GetTick() - tickstart) > ETH_SWRESET_TIMEOUT))
    {
    /* Set Error Code */
    heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT;
    /* Set State as Error */
    heth->gState = HAL_ETH_STATE_ERROR;
    /* Return Error */
    printf("6 ERROR."); // I just put info to UART terminal
    return HAL_ERROR;
    }
    }

     

    Added later:

    Comment out the DHCP section of code and set your ip manually in IPInstance. Changing the IP will call a Callback function which unlocks the Semaphore.

    I also tried to start with STATIC ADDRESS and disable all DHCP inititializationprior to write this comment, for ETH1 it is working correctly

    ret = nx_ip_create(&IpInstance, "Main Ip instance", STATIC_ADDRESS, MASK_ADDRESS, &AppPool, nx_stm32_eth_driver,

    but for ETH2 when I do this it will pass all initialization but after I tried to get IP number it will get 0.0.0.0.

     

    nx_ip_address_get(&IpInstance, &IpAddress, &NetMask);

    /* print the IP address */

    PRINT_IP_ADDRESS(IpAddress);

    For ETH1 I get IpAddress as STATIC_ADDRESS.

    So I am also in contact with ST support. And I will inform back what was wrong else...

    Best Regards

    Radim

    Graduate II
    March 4, 2024

    Hello @ravo ,

     

    I hope you are doing well.

     

    5. Adjust the clock configuration for eth2. It should use 50 MHz and probably be configured with HSE.

    I don't know how to do this

    > If you can't guarantee eth2 source clock being set to 50 MHz, it just won't work. ST Support will tell you no different. In CubeIDE, there is a whole section to adjust the clock configuration. You could just try to configure 50 MHz on eth2 and understand what is actually being changed. 

     

    Best

    J. Schneider

    Graduate II
    March 4, 2024

    Dear @jschneider 

    I just forgot to initiate IRQ pin, and one clock pin.

    Very thanks, I also consulted with ST guy and he prefer to 

    SYSCFG->PMCSETR |= (1<<25); at end of MX_ETH_Init function. But it did not work.

    So I put to place as you suggest and it started working

    So Very thanks for your comments.

    No I would like to use both eth1 and eth2. And has some problems with initialize driver. (driver library would preffer only single eth). Maybe I need to copy whole  nx_stm32_eth_driver.c to new one... I don't find any examples yet, and in documentation is not written.

     

    Do you have working dual eth at one time ?

    Best Regards

    Radim

     

    Graduate II
    March 11, 2024

    Hi @ravo ,

     

    I am happy to see your success.

    I haven't used both eth interfaces at once in an Azure RTOS app yet. I am going to do so. For now I wanted to finish the initialization. You are correct, you have to modify nx_stm32_eth_driver.c. Reading the NetXDuo manual is probably a good place to start. In my opinion, it all comes down to modifying the IPInstance structure.

     

    If you find a solution, I encourage you to provide a sample instruction, as I will do the same.

     

    Best,

    J. Schneider

    Graduate II
    March 19, 2024

    Dear @jschneider 

    I am in contact wit ST support, there is need to modify nx_stm32_eth_driver.c/h - currently support only one interface at time. HAL already have multiple network interface.

    I tried to look at driver which has already multiple instances support - nx_ram_network_driver.c/h, located in \STM32Cube_FW_MP13_V1.0.0\Middlewares\ST\netxduo\common\src - but it could be a lot of work.

    So I will wait when ST update nx_stm32_eth_driver.c/h

    If I will have some news I will post here.

    Regards Radim

    Graduate II
    April 12, 2024

    Dear @jschneider 

    Do you have some news ? I have only small update, the support for dual eth should be in next release (2 - 3 months)

    Radim

    Graduate II
    April 16, 2024

    Hi @ravo 

    Thank you for your update. For now I have some other priorities. Waiting for the support seems like a better option.

     

    Best,

    J. Schneider