STM32MP135D-ODYSSEY booting gets struck with INFO: SPSR = 0x1d3 message after BL2 booting BL32 with SD Card

[aravindhan]

aravindhan:~$ sudo picocom -b 115200 /dev/ttyUSB0
picocom v3.1

port is : /dev/ttyUSB0
flowcontrol : none
baudrate is : 115200
parity is : none
databits are : 8
stopbits are : 1
escape is : C-a
local echo is : no
noinit is : no
noreset is : no
hangup is : no
nolock is : no
send_cmd is : sz -vv
receive_cmd is : rz -vv -E
imap is :
omap is :
emap is : crcrlf,delbs,
logfile is : none
initstring : none
exit_after is : not set
exit is : no

Type [C-a] [C-h] to see available commands
Terminal ready
�NOTICE: CPU: STM32MP135D Rev.Y
NOTICE: Model: Seeed STM32MP135D Odyssey Board
INFO: PMIC version = 0x21
INFO: Reset reason (0x35):
INFO: Power-on Reset (rst_por)
INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe0000
INFO: FCONF: Reading firmware configuration information for: stm32mp_io
INFO: Using SDMMC
INFO: Instance 1
INFO: Boot used partition fsbl1
NOTICE: BL2: v2.8-stm32mp1-r1.0(debug):38df888b0-dirty(38df888b)
NOTICE: BL2: Built : 01:36:41, Mar 15 2024
INFO: BL2: Doing platform setup
INFO: RAM: DDR3-1066 bin F 1x4Gb 533MHz v1.53
INFO: Memory size = 0x20000000 (512 MB)
INFO: BL2: Loading image id 1
INFO: Loading image id=1 at address 0x30006000
INFO: Image id=1 loaded: 0x30006000 - 0x30006246
INFO: FCONF: Reading FW_CONFIG firmware configuration file from: 0x30006000
INFO: FCONF: Reading firmware configuration information for: mce_config
INFO: FCONF: Reading firmware configuration information for: dyn_cfg
INFO: FCONF: Reading firmware configuration information for: stm32mp1_firewall
INFO: BL2: Loading image id 4
INFO: Loading image id=4 at address 0xde200000
INFO: Image id=4 loaded: 0xde200000 - 0xde20001c
INFO: OPTEE ep=0xde200000
INFO: OPTEE header info:
INFO: magic=0x4554504f
INFO: version=0x2
INFO: arch=0x0
INFO: flags=0x0
INFO: nb_images=0x1
INFO: BL2: Loading image id 8
INFO: Loading image id=8 at address 0xde200000
INFO: Image id=8 loaded: 0xde200000 - 0xde277418
INFO: BL2: Loading image id 2
INFO: Loading image id=2 at address 0xc0400000
INFO: Image id=2 loaded: 0xc0400000 - 0xc040e648
INFO: BL2: Skip loading image id 16
INFO: BL2: Loading image id 5
INFO: Loading image id=5 at address 0xc0000000
INFO: Image id=5 loaded: 0xc0000000 - 0xc0115bd8
NOTICE: BL2: Booting BL32
INFO: Entry point address = 0xde200000
INFO: SPSR = 0x1d3                                                            ---- here fw-config is disabled in tf-a and I changed OP-TEE header address (init_load_addr) in /build-openstlinuxweston-stm32mp1/workspace/sources/tf-a-stm32mp/lib/optee/optee_utils.c to bypass my previous error "WARNING: The load address in optee header 0xde000000 - 0xde077418 is not in reserved area: 0xde200000 - 0xe0000000.
ERROR: OPTEE header parse error."

[Gregory PLANCHON]

Hi @aravindhan,

 

Could you share your U-boot device tree with me and explain a little more about what you want to do?

 

Regards,

Grégory

[aravindhan]

I notice in my plat-stm32mp1/conf.mk file that for stm32mp13  

CFG_STM32MP_PROFILE ?= secure_and_system_services, so this means it will be running in SYSRAM right? but after that it forces to use DDR (

$(call force,CFG_STM32MP1_OPTEE_IN_SYSRAM,n)

) why? I will also attach my conf.mk and U-boot device tree file below.----------------------------------------------------------------

# 1GB and 512MB DDR targets do not locate secure DDR at the same place.

flavor_dts_file-157A_DHCOR_AVENGER96 = stm32mp157a-dhcor-avenger96.dts

flavor_dts_file-157A_DK1 = stm32mp157a-dk1.dts

flavor_dts_file-157A_ED1 = stm32mp157a-ed1.dts

flavor_dts_file-157A_EV1 = stm32mp157a-ev1.dts

flavor_dts_file-157C_DHCOM_PDK2 = stm32mp157c-dhcom-pdk2.dts

flavor_dts_file-157C_DK2 = stm32mp157c-dk2.dts

flavor_dts_file-157C_ED1 = stm32mp157c-ed1.dts

flavor_dts_file-157C_EV1 = stm32mp157c-ev1.dts

flavor_dts_file-157D_DK1 = stm32mp157d-dk1.dts

flavor_dts_file-157D_ED1 = stm32mp157d-ed1.dts

flavor_dts_file-157D_EV1 = stm32mp157d-ev1.dts

flavor_dts_file-157F_DK2 = stm32mp157f-dk2.dts

flavor_dts_file-157F_ED1 = stm32mp157f-ed1.dts

flavor_dts_file-157F_EV1 = stm32mp157f-ev1.dts

flavor_dts_file-135F_DK = stm32mp135f-dk.dts

flavor_dts_file-135D_ODYSSEY = stm32mp135d-odyssey.dts

flavorlist-cryp-512M = $(flavor_dts_file-157C_DK2) \

$(flavor_dts_file-157F_DK2) \

$(flavor_dts_file-135F_DK) \

$(flavor_dts_file-135D_ODYSSEY)

flavorlist-no_cryp-512M = $(flavor_dts_file-157A_DK1) \

$(flavor_dts_file-157D_DK1)

flavorlist-cryp-1G = $(flavor_dts_file-157C_DHCOM_PDK2) \

$(flavor_dts_file-157C_ED1) \

$(flavor_dts_file-157C_EV1) \

$(flavor_dts_file-157F_ED1) \

$(flavor_dts_file-157F_EV1)

flavorlist-no_cryp-1G = $(flavor_dts_file-157A_ED1) \

$(flavor_dts_file-157A_EV1) \

$(flavor_dts_file-157A_DHCOR_AVENGER96) \

$(flavor_dts_file-157D_ED1) \

$(flavor_dts_file-157D_EV1)

flavorlist-no_cryp = $(flavorlist-no_cryp-512M) \

$(flavorlist-no_cryp-1G)

flavorlist-512M = $(flavorlist-cryp-512M) \

$(flavorlist-no_cryp-512M)

flavorlist-1G = $(flavorlist-cryp-1G) \

$(flavorlist-no_cryp-1G)

flavorlist-MP15 = $(flavor_dts_file-157A_DHCOR_AVENGER96) \

$(flavor_dts_file-157A_DK1) \

$(flavor_dts_file-157A_ED1) \

$(flavor_dts_file-157A_EV1) \

$(flavor_dts_file-157C_DHCOM_PDK2) \

$(flavor_dts_file-157C_DK2) \

$(flavor_dts_file-157C_ED1) \

$(flavor_dts_file-157C_EV1) \

$(flavor_dts_file-157D_DK1) \

$(flavor_dts_file-157D_ED1) \

$(flavor_dts_file-157D_EV1) \

$(flavor_dts_file-157F_DK2) \

$(flavor_dts_file-157F_ED1) \

$(flavor_dts_file-157F_EV1)

#flavorlist-MP13 = $(flavor_dts_file-135F_DK)

flavorlist-MP13 = $(flavor_dts_file-135D_ODYSSEY)

# External device tree default path

CFG_EXT_DTS ?= $(arch-dir)/dts/external-dt/optee

# Extend flavorlists with external device trees

ifneq ($(wildcard $(CFG_EXT_DTS)/conf.mk),)

-include $(CFG_EXT_DTS)/conf.mk

endif

# List of all DTS for this PLATFORM

ALL_DTS = $(flavorlist-MP15) $(flavorlist-MP13)

# Check if device-tree exist in OP-TEE source code, else search it in external

# device tree repository

ifeq ($(wildcard $(arch-dir)/dts/$(CFG_EMBED_DTB_SOURCE_FILE)),)

ifneq ($(wildcard $(CFG_EXT_DTS)/$(CFG_EMBED_DTB_SOURCE_FILE)),)

override dts-source-path := $(CFG_EXT_DTS)

else

$(error Cannot find DTS file $(CFG_EXT_DTS)/$(CFG_EMBED_DTB_SOURCE_FILE))

endif

endif

ifneq ($(PLATFORM_FLAVOR),)

ifeq ($(flavor_dts_file-$(PLATFORM_FLAVOR)),)

$(error Invalid platform flavor $(PLATFORM_FLAVOR))

endif

CFG_EMBED_DTB_SOURCE_FILE ?= $(flavor_dts_file-$(PLATFORM_FLAVOR))

endif

CFG_EMBED_DTB_SOURCE_FILE ?= stm32mp157c-dk2.dts

# CFG_STM32MP1x switches are exclusive.

# - CFG_STM32MP15 is enabled for STM32MP15x-* targets (default)

# - CFG_STM32MP13 is enabled for STM32MP13x-* targets

# We try to guess the variant from the embedded DT source file name

ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-MP13)),)

$(call force,CFG_STM32MP13,y)

endif

ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-MP15)),)

$(call force,CFG_STM32MP15,y)

endif

ifeq ($(CFG_STM32MP13),y)

$(call force,CFG_STM32MP15,n)

else

$(call force,CFG_STM32MP15,y)

$(call force,CFG_STM32MP13,n)

endif

ifeq ($(call cfg-one-enabled,CFG_STM32MP15 CFG_STM32MP13),n)

$(error One of CFG_STM32MP15 CFG_STM32MP13 must be enabled)

endif

ifeq ($(call cfg-all-enabled,CFG_STM32MP15 CFG_STM32MP13),y)

$(error Only one of CFG_STM32MP15 CFG_STM32MP13 must be enabled)

endif

# CFG_STM32MP_PROFILE selects the profile of the services embedded

# in OP-TEE.

ifeq ($(CFG_STM32MP13),y)

# STM32MP13: default select secure_and_system_services.

# Alternate system_services is supported.

CFG_STM32MP_PROFILE ?= secure_and_system_services

endif #CFG_STM32MP13

ifeq ($(CFG_STM32MP15),y)

# STM32MP15: default select system_services, OP-TEE executes in DDR

# (i.e. CFG_STM32MP1_OPTEE_IN_SYSRAM=n).

# Alternate secure_and_system_services executes in SRAM

# (i.e. CFG_STM32MP1_OPTEE_IN_SYSRAM=y).

ifeq ($(CFG_STM32MP1_OPTEE_IN_SYSRAM),y)

$(call force,CFG_STM32MP_PROFILE,secure_and_system_services)

endif

CFG_STM32MP_PROFILE ?= system_services

ifeq ($(CFG_STM32MP_PROFILE),secure_and_system_services)

$(call force,CFG_STM32MP1_OPTEE_IN_SYSRAM,y,Required by secure_and_system_services profile)

else

$(call force,CFG_STM32MP1_OPTEE_IN_SYSRAM,n,Required by system_services profile)

endif

endif #CFG_STM32MP15

ifeq ($(filter $(CFG_STM32MP_PROFILE),system_services secure_and_system_services),)

$(error CFG_STM32MP_PROFILE shall be one of system_services or secure_and_system_services)

endif

ifeq ($(CFG_STM32MP_PROFILE),system_services)

include $(platform-dir)/conf.disable-secure-services.mk

endif

ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-no_cryp)),)

$(call force,CFG_STM32_CRYP,n)

$(call force,CFG_STM32_PKA,n)

$(call force,CFG_STM32_SAES,n)

endif

ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-no_rng)),)

$(call force,CFG_HWRNG_PTA,n)

$(call force,CFG_STM32_PKA,n)

$(call force,CFG_STM32_SAES,n)

CFG_WITH_SOFTWARE_PRNG ?= y

endif

# Default do not access external DT passed to non-secure boot stage

CFG_EXTERNAL_DT ?= n

include core/arch/arm/cpu/cortex-a7.mk

$(call force,CFG_ARM_GIC_PM,y)

$(call force,CFG_DRIVERS_CLK,y)

$(call force,CFG_DRIVERS_CLK_DT,y)

$(call force,CFG_DRIVERS_GPIO,y)

$(call force,CFG_DRIVERS_PINCTRL,y)

$(call force,CFG_DRIVERS_REGULATOR,y)

$(call force,CFG_GIC,y)

$(call force,CFG_INIT_CNTVOFF,y)

$(call force,CFG_PM_ARM32,y)

$(call force,CFG_PSCI_ARM32,y)

$(call force,CFG_REGULATOR_FIXED,y)

$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)

$(call force,CFG_SM_PLATFORM_HANDLER,y)

$(call force,CFG_STM32_SHARED_IO,y)

ifeq ($(CFG_STM32MP13),y)

$(call force,CFG_BOOT_SECONDARY_REQUEST,n)

$(call force,CFG_CORE_ASYNC_NOTIF,y)

$(call force,CFG_CORE_ASYNC_NOTIF_GIC_INTID,31)

$(call force,CFG_CORE_RESERVED_SHM,n)

$(call force,CFG_DRIVERS_ADC,y)

$(call force,CFG_DRIVERS_CLK,y)

$(call force,CFG_DRIVERS_CLK_FIXED,y)

$(call force,CFG_SCMI_MSG_PERF_DOMAIN,y)

$(call force,CFG_SECONDARY_INIT_CNTFRQ,n)

$(call force,CFG_STM32_EXTI,y)

$(call force,CFG_STM32_GPIO,y)

$(call force,CFG_STM32_HSE_MONITORING,y)

$(call force,CFG_STM32_VREFBUF,y)

$(call force,CFG_STM32MP_CLK_CORE,y)

$(call force,CFG_STM32MP1_OPTEE_IN_SYSRAM,n)

$(call force,CFG_STM32MP1_SHARED_RESOURCES,n)

$(call force,CFG_STM32MP1_RSTCTRL,y)

$(call force,CFG_STM32MP13_CLK,y)

$(call force,CFG_STM32MP13_REGULATOR_IOD,y)

$(call force,CFG_TEE_CORE_NB_CORE,1)

$(call force,CFG_WITH_NSEC_GPIOS,n)

CFG_STM32MP_OPP_COUNT ?= 3

CFG_STM32_ADC ?= y

CFG_WITH_PAGER ?= n

CFG_WITH_TUI ?= y

endif # CFG_STM32MP13

ifeq ($(CFG_STM32MP15),y)

$(call force,CFG_BOOT_SECONDARY_REQUEST,y)

$(call force,CFG_DRIVERS_CLK_FIXED,y)

$(call force,CFG_DDR_LOWPOWER,y)

$(call force,CFG_HALT_CORES_ON_PANIC_SGI,15)

$(call force,CFG_SCMI_MSG_PERF_DOMAIN,n)

$(call force,CFG_SECONDARY_INIT_CNTFRQ,y)

$(call force,CFG_STM32MP1_SHARED_RESOURCES,y)

$(call force,CFG_STM32_PKA,n)

$(call force,CFG_STM32_SAES,n)

$(call force,CFG_STM32MP1_RSTCTRL,y)

$(call force,CFG_STM32MP15_CLK,y)

$(call force,CFG_STM32MP_CLK_CORE,y)

CFG_CORE_RESERVED_SHM ?= n

CFG_HALT_CORES_ON_PANIC ?= y

CFG_TEE_CORE_NB_CORE ?= 2

CFG_STM32MP1_OPTEE_IN_SYSRAM ?= n

ifeq ($(CFG_STM32MP1_OPTEE_IN_SYSRAM),y)

$(call force,CFG_WITH_PAGER,y)

CFG_STM32MP15_HUK ?= y

endif

endif # CFG_STM32MP15