Question
STM32MP151. Display controller questions.
1. Can the display interface be driven by the M4 core while the A7 core is powered down?
1a. Can the AXI interconnect peripherals be driven by the M4 while the A7 cores are powered down?
2. Display controller - is there any loss in performance if using an external display controller via SPI interface instead of using the native RGB LTDC interface directly to a display?
