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nk_narayanan
Explorer
October 4, 2023
Solved

STM32MP153 NOR Flash boot issue with 32Mb

  • October 4, 2023
  • 2 replies
  • 2598 views

Hi all,

Our product uses an STM32MP153 processor, booting its first and second stage bootloaders (TF-A and uboot respectively) from QUADSPI NOR FLASH. It boots Linux from eMMC. The NOR FLASH we have been using are either IS25LP016D-JNLE or AT25SF161B-SSHB-B which are both 16Mbit.

We are experimenting with using a larger 32Mb NOR FLASH due to customer request. We have built a batch of PCBAs with IS25LP032D-JNLE instead of the IS25LP016D.

However on 4 out of 12 boards, we see the below:
- Programming works ok, all stages are flashed onto the respective parts. stm32 cube programmer reports success
- When rebooted after programming, the MP1 still boots in DFU mode.
- Checked BOOT mode pins and they are set to 001, not 000, so its not the boot mode.
- NORFLASH chip has been written to and read back correctly and program has been verified, so there is no data corruption
- Re-ran stm32 cube programmer several times, and MP1 always reboots in DFU mode
- We suspect that there is a timing issue, the larger NORFLASH is not responding quick enough for the MP1. At this stage it is only ST's own BOOTROM that is running so we have no control over this

Please let us know if you have any solutions to this problem

Thanking you very much in advance

    This topic has been closed for replies.
    Best answer by PatrickF

    HI @nk_narayanan ,

    one usual pitfall is the Serial-NOR hold pin (usually IO3) not driven, so Serial-NOR does not output any data.
    BootROM uses Serial-NOR in legacy SPI and does not drive IO2/IO3 (where uBoot or Linux use it in 4 bit mode).
    This is highlighted in AN5031.

    PatrickF_0-1696486967146.png

    Hold pin pull-up could be done at board level (discrete 10K pull-up) or by enabling internal pullup by using one of OTP Word5-7 settings (please refer to https://wiki.st.com/stm32mpu/wiki/STM32MP15_OTP_mapping#AFmux_configuration)

    Regards.

    2 replies

    D
    debugging
    Graduate II
    October 4, 2023

    Not  sure, at boot time the power can be unstable, Have you tried a PU , PD res or a cap on the boot pins to make sure there isn't a glitch ?

    N
    nk_narayananAuthor
    Explorer
    October 6, 2023

    Thanks, checked the boot pins and they seem stable

    P
    PatrickFAnswer
    Technical Moderator
    October 5, 2023

    HI @nk_narayanan ,

    one usual pitfall is the Serial-NOR hold pin (usually IO3) not driven, so Serial-NOR does not output any data.
    BootROM uses Serial-NOR in legacy SPI and does not drive IO2/IO3 (where uBoot or Linux use it in 4 bit mode).
    This is highlighted in AN5031.

    PatrickF_0-1696486967146.png

    Hold pin pull-up could be done at board level (discrete 10K pull-up) or by enabling internal pullup by using one of OTP Word5-7 settings (please refer to https://wiki.st.com/stm32mpu/wiki/STM32MP15_OTP_mapping#AFmux_configuration)

    Regards.

      N
      nk_narayananAuthor
      Explorer
      October 6, 2023

      Thanks for your help, the 10K pullup resistor on IO3 (HOLD) pin worked. What was strange was that the 16Mbit NORFLASH from the same family worked fine without the 10K pullup on IO3. 

      P
      PatrickF
      Technical Moderator
      October 6, 2023

      An open input signal is per definition 'undefined', so with some chances it was seen as logic '1' by the memory, but at some point of time it might stop to work due to product aging and with varying conditions such as temperatures.

      I would recommend to test the 16MBit board with a weak pull-down on IO3 (e.g. 100k-1M) to see if it still boot correctly. If not, it is strongly recommended to add the pull-up too (externally or by OTP).

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