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Visitor II
December 7, 2019
Question

STM32MP157AAA3 only support 16bit-LPDDR3?

  • December 7, 2019
  • 2 replies
  • 1099 views

I used 1GB LPDDR3 at STM32MP157AAA3 chips.but it's only read 512MB:sad_but_relieved_face:

    This topic has been closed for replies.

    2 replies

    Technical Moderator
    December 9, 2019

    Maybe double check your CubeMX and effective DT settings.

    You should have somewhere: #define DDR_MEM_SIZE 0x40000000 and relevant DDR controller settings

    Find below an example of a possible LPDDR3 setting.

    // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause

    /*

     * Copyright (C) 2018, STMicroelectronics - All Rights Reserved

     *

     * 8Gb LPDDR3 32-bit BGA / SDP / 533 Mhz

     * Reference used H9CCNNNBGALAR-NXD

     *

     * DDR type / Platform   LPDDR3

     * freq      533MHz

     * width   32

     * datasheet   0

     * DDR density   8

     * timing mode   optimized

     * Scheduling/QoS options : type = 2

     * address mapping : RBC

     * Tc > + 85C : N

     */

    #define DDR_MEM_NAME "LPDDR3 8Gb 533MHz v1.45"

    #define DDR_MEM_SPEED 533000

    #define DDR_MEM_SIZE 0x40000000

    #define DDR_MSTR 0x00040008

    #define DDR_MRCTRL0 0x00000010

    #define DDR_MRCTRL1 0x00000000

    #define DDR_DERATEEN 0x00000001

    #define DDR_DERATEINT 0x00800000

    #define DDR_PWRCTL 0x00000000

    #define DDR_PWRTMG 0x00400010

    #define DDR_HWLPCTL 0x00000000

    #define DDR_RFSHCTL0 0x00210000

    #define DDR_RFSHCTL3 0x00000000

    #define DDR_RFSHTMG 0x00400070

    #define DDR_CRCPARCTL0 0x00000000

    #define DDR_DRAMTMG0 0x111B1217

    #define DDR_DRAMTMG1 0x00040423

    #define DDR_DRAMTMG2 0x04080C0F

    #define DDR_DRAMTMG3 0x00A0A00C

    #define DDR_DRAMTMG4 0x0804060C

    #define DDR_DRAMTMG5 0x02020808

    #define DDR_DRAMTMG6 0x02020006

    #define DDR_DRAMTMG7 0x00000202

    #define DDR_DRAMTMG8 0x00004405

    #define DDR_DRAMTMG14 0x00000076

    #define DDR_ZQCTL0 0xC2000040

    #define DDR_DFITMG0 0x02060104

    #define DDR_DFITMG1 0x00000202

    #define DDR_DFILPCFG0 0x07000000

    #define DDR_DFIUPD0 0xC0400003

    #define DDR_DFIUPD1 0x00000000

    #define DDR_DFIUPD2 0x00000000

    #define DDR_DFIPHYMSTR 0x00000001

    #define DDR_ADDRMAP1 0x00080808

    #define DDR_ADDRMAP2 0x00000000

    #define DDR_ADDRMAP3 0x00000000

    #define DDR_ADDRMAP4 0x00001F1F

    #define DDR_ADDRMAP5 0x07070707

    #define DDR_ADDRMAP6 0x0F070707

    #define DDR_ADDRMAP9 0x00000000

    #define DDR_ADDRMAP10 0x00000000

    #define DDR_ADDRMAP11 0x00000000

    #define DDR_ODTCFG 0x04000400

    #define DDR_ODTMAP 0x00000000

    #define DDR_SCHED 0x00000C01

    #define DDR_SCHED1 0x00000000

    #define DDR_PERFHPR1 0x01000001

    #define DDR_PERFLPR1 0x08000200

    #define DDR_PERFWR1 0x08000400

    #define DDR_DBG0 0x00000000

    #define DDR_DBG1 0x00000000

    #define DDR_DBGCMD 0x00000000

    #define DDR_POISONCFG 0x00000000

    #define DDR_PCCFG 0x00000010

    #define DDR_PCFGR_0 0x00010000

    #define DDR_PCFGW_0 0x00000000

    #define DDR_PCFGQOS0_0 0x02100C03

    #define DDR_PCFGQOS1_0 0x00800100

    #define DDR_PCFGWQOS0_0 0x01100C03

    #define DDR_PCFGWQOS1_0 0x01000200

    #define DDR_PCFGR_1 0x00010000

    #define DDR_PCFGW_1 0x00000000

    #define DDR_PCFGQOS0_1 0x02100C03

    #define DDR_PCFGQOS1_1 0x00800040

    #define DDR_PCFGWQOS0_1 0x01100C03

    #define DDR_PCFGWQOS1_1 0x01000200

    #define DDR_PGCR 0x01442E02

    #define DDR_PTR0 0x0022AA5B

    #define DDR_PTR1 0x01B1A068

    #define DDR_PTR2 0x042A16E7

    #define DDR_ACIOCR 0x38400812

    #define DDR_DXCCR 0x00000910

    #define DDR_DSGCR 0x9100025F

    #define DDR_DCR 0x0000000D

    #define DDR_DTPR0 0x46D78BD0

    #define DDR_DTPR1 0x117000D8

    #define DDR_DTPR2 0x00041076

    #define DDR_MR0 0x00000000

    #define DDR_MR1 0x000000C3

    #define DDR_MR2 0x00000006

    #define DDR_MR3 0x00000003

    #define DDR_ODTCR 0x00000000

    #define DDR_ZQ0CR1 0x00000018

    #define DDR_DX0GCR 0x0000C881

    #define DDR_DX0DLLCR 0x40000000

    #define DDR_DX0DQTR 0xFFFFFFFF

    #define DDR_DX0DQSTR 0x3DB02000

    #define DDR_DX1GCR 0x0000C881

    #define DDR_DX1DLLCR 0x40000000

    #define DDR_DX1DQTR 0xFFFFFFFF

    #define DDR_DX1DQSTR 0x3DB02000

    #define DDR_DX2GCR 0x0000C881

    #define DDR_DX2DLLCR 0x40000000

    #define DDR_DX2DQTR 0xFFFFFFFF

    #define DDR_DX2DQSTR 0x3DB02000

    #define DDR_DX3GCR 0x0000C881

    #define DDR_DX3DLLCR 0x40000000

    #define DDR_DX3DQTR 0xFFFFFFFF

    #define DDR_DX3DQSTR 0x3DB02000

    #include "stm32mp15-ddr.dtsi"

    MokailAuthor
    Visitor II
    December 9, 2019

    Can you see me another problem?i used sii9022 chip for hdmi,but it's not work ​and always busy.:sad_but_relieved_face: