STM32MP157CAA3 + MT41K512M16VRP-107

[MWoło.2]

Hi,

I try to combine STM32MP157CAA3 with DDR3L 8Gbits density. I modified cubemx to support 8Gbit memory and recompiled the Openstlinux mp1-v22.11.23 kirkstone.

The problem is that DDR3 is detected in the first stage U-Boot but not executed 2nd stage U-Boot and reboot a few times after stack. The question is do STM32MP157CAA3 support 8Gbits density DDR3 memory in one chip and if yes what is wrong?

Log from boot process

NOTICE: CPU: STM32MP157CAA Rev.Z 
NOTICE: Model: STMicroelectronics custom STM32CubeMX board - openstlinux-5.15-5
INFO: PMIC version = 0x21 
INFO: Reset reason (0x15): 
INFO: Power-on Reset (rst_por) 
INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000 
INFO: FCONF: Reading firmware configuration information for: stm32mp_io 
INFO: Using USB 
INFO: Instance 2 
INFO: Boot used partition fsbl1 
NOTICE: BL2: v2.6-stm32mp1-r2.0(debug):v2.6-dirty(a1f02f4f) 
NOTICE: BL2: Built : 13:14:26, Nov 23 2021 
INFO: BL2: Doing platform setup 
INFO: RAM: DDR3-DDR3L 16bits 533000kHz 
INFO: Memory size = 0x40000000 (1024 MB) 
INFO: DFU USB START... 
INFO: phase ID :3, Manifestation 3 at c7119835 
INFO: Send detach request 
INFO: Receive DFU Detach 
INFO: DFU USB STOP... 
INFO: BL2: Loading image id 1 
INFO: Loading image id=1 at address 0x2ffff000 
INFO: Image id=1 loaded: 0x2ffff000 - 0x2ffff226 
INFO: FCONF: Reading FW_CONFIG firmware configuration file from: 0x2ffff000 
INFO: FCONF: Reading firmware configuration information for: dyn_cfg 
INFO: FCONF: Reading firmware configuration information for: stm32mp1_firewal
INFO: BL2: Loading image id 4 
INFO: Loading image id=4 at address 0x2ffc5000 
INFO: Image id=4 loaded: 0x2ffc5000 - 0x2ffd9820 
INFO: BL2: Skip loading image id 8 
INFO: BL2: Skip loading image id 9 
INFO: BL2: Loading image id 2 
INFO: Loading image id=2 at address 0xc0500000 
INFO: Image id=2 loaded: 0xc0500000 - 0xc0513be8 
INFO: BL2: Loading image id 16 
INFO: Loading image id=16 at address 0x2ffc0000 
INFO: Image id=16 loaded: 0x2ffc0000 - 0x2ffc427f 
INFO: BL2: Loading image id 5 
INFO: Loading image id=5 at address 0xc0100000 
INFO: Image id=5 loaded: 0xc0100000 - 0xc01ece88 
NOTICE: BL2: Booting BL32 
INFO: Entry point address = 0x2ffc5000 
INFO: SPSR = 0x1d3 

[PatrickF]

Hi,

Here you are still in TF-A (in SYSRAM) which load U-Boot in DDR then launch it (but this seems to fail).

https://wiki.st.com/stm32mpu/wiki/Boot_chain_overview#STM32MP15_boot_chain

Did you test your DDR3 is working by using https://wiki.st.com/stm32mpu/wiki/STM32DDRFW-UTIL with CubeMX DDR Tool ?

Did you try to debug https://wiki.st.com/stm32mpu/wiki/How_to_debug_TF-A_SP-MIN ?

Regards.

[MWoło.2]

Hi Patrick,

I try to compile ddr tool for M4 but printf not working for some reason.

I have my own custom board with changed UART4 debug ports and I2C4 different ports.

So I changed ports and pmic is configured well UART4 also but I see on the console only "DDR>" and I can provide some text like "step 3" but not see anything like DDR> and my texts. Of course, I assigned buttons and LEDs which seem to work

Reworking this firmware is a difficult task.

The preprocessor definition I used are

How to force to see printf

 

• After the step above lines I see nothing in my uart terminal console why?

[MWoło.2]

After taking and reworking project STM32MP!57C-DK2-DDR_UTILITIES_A7 something starts working.

So the result is as follow

for 8Gbit/16bits data width

DDR>test 0 
 test_databus KO @ 0xc0000000 
Test Simple DataBus failed [2] 
Test All failed [2] 
DDR>

and the same for 4Gbit/16bits data width

DDR>test 0 
result 1:Test Simple DataBus = Passed 
result 2:Test DataBusWalking0 = Passed 
result 3:Test DataBusWalking1 = Passed 
result 4:Test AddressBus = Passed 
result 5:Test MemDevice = Passed 
result 6:Test SimultaneousSwitchingOutput = Passed 
result 7:Test Noise = Passed 
result 8:Test NoiseBurst = Passed 
result 9:Test Random = Passed 
result 10:Test FrequencySelectivePattern = Passed 
result 11:Test BlockSequential = Passed 
result 12:Test Checkerboard = Passed 
result 13:Test BitSpread = Passed 
result 14:Test BitFlip = Passed 
result 15:Test WalkingZeroes = Passed 
result 16:Test WalkingOnes = Passed 
Result: Pass [Test All] 

 Of course, I changed the preprocessor definition before compilation and testing.

I think some of the parameters for 8Gbit DDR3 are wrong because I made the test memories on the same hardware configuration (of course A15 is included).

STM32CUBEMX gives some default parameters.

[MWoło.2]

Hi,

now I have a positive result for 8Gbits DDR3 after copy parameters of DDR3 generated from CubeMx

Model: STM32MP15XX 
RAM: DDR3-DDR3L 16bits 533000kHz 
0:DDR_RESET
DDR>step 0
step to 0:DDR_RESET
DDR>step 1
step to 1:DDR_CTRL_INIT_DONE
1:DDR_CTRL_INIT_DONE
DDR>step 2
step to 2:DDR_PHY_INIT_DONE
2:DDR_PHY_INIT_DONE
DDR>step 3
step to 3:DDR_READY 
3:DDR_READY 
DDR>test 0 
result 1:Test Simple DataBus = Passed 
result 2:Test DataBusWalking0 = Passed 
result 3:Test DataBusWalking1 = Passed 
result 4:Test AddressBus = Passed 
result 5:Test MemDevice = Passed 
result 6:Test SimultaneousSwitchingOutput = Passed 
result 7:Test Noise = Passed 
result 8:Test NoiseBurst = Passed 
result 9:Test Random = Passed 
result 10:Test FrequencySelectivePattern = Passed 
result 11:Test BlockSequential = Passed 
result 12:Test Checkerboard = Passed 
result 13:Test BitSpread = Passed 
result 14:Test BitFlip = Passed 
result 15:Test WalkingZeroes = Passed 
result 16:Test WalkingOnes = Passed 
Result: Pass [Test All]

So testing in progress.

[MWoło.2]

All memory tested without any problem form soldering, parameter and hardware point of view. So without debugging tf-a can't tell more.

Maybe some secure option reset CPU (Power on reset 0x15).

[PatrickF]

Hi @Michał Wołowik​,

nice to see some progress.

Apart potential SW issue (I'm not expert), maybe check your supplies, you might have drop (or oscillation) below some reset trip point when power start to increase at some point of time during boot.

Did you use STPMIC1 with recommended components/routing ?

Regards.

[PatrickF]

Please also check any mixup between upper and lower bytes DQS/DQM.

All(most?) DDRFWUTIL tests are done with 32-bits access while uBoot will uses bytes and then could fail.

Regards.

[MWoło.2]

Hi Patrick,

working finally. The problem was related to the hardware. I get the working board with 512MB and solder on it 1GB. Now is working without any problems. Thanks a lot.

Hmmm the profit for me was preparing this DDR test firmware for M4.

BR Michal