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Visitor II
August 8, 2024
Solved

STPMIC1 Always ON LDO for powering a supporting micro (3.3V)?

  • August 8, 2024
  • 2 replies
  • 2447 views

I have a small micro that needs to run before the MP157 is active. The voltage coming gin is 5V, but I need 3.3V. Is there an always-on LDO in the STPMIC1 for such purpose? I assume the internal LDO is not te be used?

Do I need to program the voltage of the LDO or is it set by default to 3.3V

Regards

    This topic has been closed for replies.
    Best answer by PatrickF

    Hi @roland van straten 

    on STPMIC1A, you could use Buck3 which is started at 3.3V few tens of ms before the MP157 is out of reset and maintained on every modes including Standby. If you need more time, you could maintain the NRST low form your small MCU the time you need.

    During operation of STM32MP15x, Buck3 is usually defined as 'no power cycle on NRST' within TF-A in our SW deliveries (e.g. Buck3 kept powered even when watchdog reset occurs after TF-A starts).

    Obviously, a platform shutdown requesting an STPMIC1 power-off will make the Buck3 OFF as well.

     

    Regards.

    2 replies

    ST Employee
    August 9, 2024

    Hi,

    version of STPMIC1? A, B or...?

    To have the 3.3V @Rank1 you need to program (one time, output voltage and Rank#) the LDO# in the NVM content so it will start at turn ON phase.

    The STPMIC1 I²C programming guide - Application note

     

    Regards

    Vincenzo

    PatrickFAnswer
    Technical Moderator
    August 9, 2024

    Hi @roland van straten 

    on STPMIC1A, you could use Buck3 which is started at 3.3V few tens of ms before the MP157 is out of reset and maintained on every modes including Standby. If you need more time, you could maintain the NRST low form your small MCU the time you need.

    During operation of STM32MP15x, Buck3 is usually defined as 'no power cycle on NRST' within TF-A in our SW deliveries (e.g. Buck3 kept powered even when watchdog reset occurs after TF-A starts).

    Obviously, a platform shutdown requesting an STPMIC1 power-off will make the Buck3 OFF as well.

     

    Regards.

    Visitor II
    October 30, 2024

    It seems not to work as I hoped/expected it would be :(

    The BUCK3 delivers the 3.3V as already mentioned in this thread. However, the 3.3V will turn off when pressing reset. The interrupting is short (5ms on its best behavior), but for the intended purpose not usable.

    It would be wonderful to have a LDO with permanent 3.3V.

    I did fix it with adding an external LDO.

     

    Technical Moderator
    October 30, 2024

    Hi,

    please have a look to this thread :

    https://community.st.com/t5/stm32-mpus-products/iwdg1-bit-is-not-set-in-rcc-status-register/m-p/729735/highlight/true#M12074

    you could setup any Buck or regulator to 'ignore the NRST' (in some extend, see note below) by setting the relative MRST_xxx bit(s) in STPMIC1.

    Note: these registers are volatile and should be written on each SW boot (i.e. each NRST cycle). That mean if NRST is pressed again before SW programming, the regulator will do a power cycle. This is usually not a big concern as in a final product there is usually no direct HW reset button.

    Regards.

     

    ST Employee
    August 12, 2024

    Hi roland van straten,

    you need to program the below address, see STPMIC1 DS rev.10 @page83

    Vincenzo_0-1723436107639.png

    set bit to 1 active mask reset option for selected LDO for next

    reset power-cycle. It is a single shot option and then register is reset to default

     

    Regards

    Vincenzo