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Associate II
November 19, 2023
Solved

System reset during kernel debug

  • November 19, 2023
  • 1 reply
  • 7131 views

Using MP135F-DK board.

Setup the environment and rebuild kernel.

After I use openocd and gdb success connect to linux system, try to debug linux kernel, then run some simple gdb command like "bt" or do nothing, then system get reset.

I did not get much useful info from console (minicom).

if I don't pause system and let gdb "continue", then no reset.

Is it because watchdog ? how to disable it.

This topic has been closed for replies.
Best answer by PatrickF

Hi @mingming ,

OTP (equivalent to option bytes on STM32) could only define if Watchdog is started by HW after reset or start by SW.
Once set to be started by HW, you can't revert OTP settings.
By default on our boards, it is start by SW, so you should simply disable it in Device Tree as told by @Erwan SZYMANSKI .

Regards.

1 reply

PatrickF
Technical Moderator
November 20, 2023

Hi @mingming ,

yes, it is likely a watchdog. Once started, you cannot disabled it, but you could decide to froze it when Cortex-A7 is stopped by debugger.

Please have a look to DBGMCU_APB4FZ.IWDG2

PatrickF_0-1700465655003.png

or DBGMCU_APB5FZ.IWDG1

PatrickF_1-1700465687763.png

Regards.

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mingmingAuthor
Associate II
November 20, 2023

Hello Patrick,

Do you mean I should write IWDG1 and IWDG2 register when I pause CPU by GDB ?

Is there a way I can disable watchdog permanently.
like jumper?

Or bootloader configureation to disable it at boot time?

Regards.

PatrickF
Technical Moderator
November 20, 2023

Hi,

I mean you should try to use debugger to write in the DBGMCU registers I mention in order to setup HW to freeze watchdogs during debug phases.

 

Otherwise, watchdog could be permanently disabled (i.e not started) in the device tree:

https://wiki.st.com/stm32mpu/wiki/Watchdog_overview#Kernel_configuration
https://wiki.st.com/stm32mpu/wiki/IWDG_device_tree_configuration#DT_configuration_-28board_level-29

 

Regards.

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