hello @baby_chicken
the procedure for the STM32H742 is different from the STM32F7, in fact:
To set the threshold level for the RXFIFO (Receive FIFO) in SPI communication on the STM32H7, you need to configure the FTHLV (FIFO Threshold Level) bits in the SPI control register. Here are the steps to do this:
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Determine the Data Frame Size: The FTHLV value must be programmed as a multiple of the number of frames/data access. For example:
- If 32-bit access is used for up to 8-bit frames, FTHLV should be a multiple of 4.
- If 16-bit access is used for up to 8-bit frames or 32-bit access for up to 16-bit frames, FTHLV should be a multiple of 2.
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Set the RXFIFO Threshold: The RXFIFO threshold setting must be always higher or equal to the read access size to avoid spurious extra data reads. The FIFO data access less than the configured data size is forbidden. One complete data frame must be always accessed at minimum.
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Configure the SPI Control Register: Write the appropriate value to the FTHLV bits in the SPI control register.
You can verify all this on the paragraph 55.4.14 of the RM0477.
The LL function used to Set threshold of FIFO that triggers a transfer event (FTHLV bit) is:
void LL_SPI_SetFIFOThreshold(SPI_TypeDef *SPIx, uint32_t Threshold);
Best Regards.
STTwo-32