Question
STM32CubeProgrammer using 0x40022020 to access Option Bytes of STM32G0
I am using STM32CubeProgrammer to access Option bytes of stm32g070kbt6. Everything is okay but I don't understand by STM32CubeProgrammer is using 0x40022020 to get option bytes when the documentation says it should be between 0x1FFF 7800 - 0x1FFF 787F.
PS C:\Program Files\STMicroelectronics\STM32Cube\STM32CubeProgrammer\bin> ./STM32_Programmer_CLI -c port=swd -ob displ
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STM32CubeProgrammer v2.12.0
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ST-LINK SN : 31FF74064D4E353830240243
ST-LINK FW : V2J40S7
Board : --
Voltage : 3.24V
SWD freq : 4000 KHz
Connect mode: Normal
Reset mode : Software reset
Device ID : 0x460
Revision ID : Rev B
Device name : STM32G07x/STM32G08x
Flash size : 128 KBytes
Device type : MCU
Device CPU : Cortex-M0+
BL Version : 0xB2
Debug in Low Power mode enabled
UPLOADING OPTION BYTES DATA ...
Bank : 0x00
Address : 0x40022020
Size : 112 Bytes
██████████████████████████████████████████████████ 100%
OPTION BYTES BANK: 0
Read Out Protection:
RDP : 0xAA (Level 0, no protection)
BOR Level:
BOR_EN : 0x1 (Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account)
BORR_LEV : 0x0 (BOR rising level 1 with threshold around 2.1 V)
BORF_LEV : 0x0 (BOR falling level 1 with threshold around 2.0 V)
User Configuration:
nRST_STOP : 0x1 (No reset generated when entering Stop mode)
nRST_STDBY : 0x1 (No reset generated when entering Standby mode)
nRST_SHDW : 0x1 (No reset generated when entering the Shutdown mode)
IWDG_SW : 0x1 (Software independant watchdog)
IWDG_STOP : 0x1 (IWDG counter active in stop mode)
IWDG_STDBY : 0x1 (IWDG counter active in standby mode)
WWDG_SW : 0x1 (Software window watchdog)
RAM_PARITY_CHECK: 0x1 (SRAM parity check disable)
nBOOT_SEL : 0x1 (BOOT0 signal is defined by nBOOT0 option bit)
nBOOT1 : 0x1 (Boot from Flash if BOOT0 = 0, otherwise system memory)
nBOOT0 : 0x1 (nBOOT0=1)
NRST_MODE : 0x3 (Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode))
IRHEN : 0x0 (Internal resets are propagated as simple pulse on NRST pin)
PCROP Protection:
PCROP1A_STRT : 0xFF (0x801FE00)
PCROP1A_END : 0x0 (0x8000200)
PCROP_RDP : 0x0 (PCROP zone is kept when RDP is decreased)
PCROP1B_STRT : 0xFF (0x801FE00)
PCROP1B_END : 0x0 (0x8000200)
Write Protection:
WRP1A_STRT : 0x3F (0x801F800)
WRP1A_END : 0x0 (0x8000000)
WRP1B_STRT : 0x3F (0x801F800)
WRP1B_END : 0x0 (0x8000000)
FLASH security:
BOOT_LOCK : 0x0 (Boot based on the pad/option bit configuration)
SEC_SIZE : 0x0 (0x8000000)