fMaster > 16 MHz on STM8S207: running slower?

[nholzem]

Posted on June 28, 2012 at 02:29

Hi all,

I'm moving a design from STM8S105 to STM8S207.

I'm thinking of raising the clock speed from originally 16MHz to 24 MHz in order to get more MIPS from the core.

However, for clocks > 16 MHz, the flash memory requires 1 waitsate. I suppose that the instructions are fetched by the core from within the flash (i.e. there's no cache).

If the above is true, then the core would run slower with the 24 Mhz clock. The only benefit of a faster clock would be faster peripherals.

Is that correct? (Hm now I'm thinking that I should test that with a scope)

Thanks

Nico

[fggnrc2]

Posted on June 28, 2012 at 10:21

Nico,

STM8 core clock speed is a design option.

In my opinion, a 24 MHz clock is only useful when you want to increase internal timers precision and you really need this increased precision.

Moreover, some peripherals, e.g. the ADC, must use a slower clock rate, so there is no gain in increasing clock speed.

As regards computing speed, it's better to take some measurements because:

• flash memory access time must be higher than 62.5 ns (i.e. one clock cycle at 16 MHz)
• code is fetched by using a 32 bit wide bus, so one read cycle may fill the internal 4 byte decoding cache

For these reasons, if your code contains may instructions which are longer than 2 bytes, your code may appear to run at 12 MHz.

Since power consuption is proportional to clock speed, your application power consumption will surely increase but computing speed gains are questionable...

Regards

EtaPhi

[nholzem]

Posted on June 28, 2012 at 15:27

Thanks EtaPhi for your explanation. I had indeed overlooked the 32-bit memory fetch. I'll do some measurements at some point because it doesn't seem easily predictable.

Cheers

Nico