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Visitor II
September 24, 2019
Solved

I need to know why the timer is not updating for every 1000hz in my code

  • September 24, 2019
  • 3 replies
  • 1912 views

#include <iostm8l.h>

#include <stdio.h>

#include <string.h>

#include <stdlib.h>

#include "defs.h"

unsigned int count = 0;

@svlreg @interrupt void TIM1(void)

{

count += 1;

TIM1_SR1 &= ~(0x01);

}

main()

{

CLK_DIVR = 0x00; // Set the frequency to 16Mhz

CLK_PCKENR2 = 0x02; // clock for timer1

PC_DDR = 0x80; // direction output for led

 PC_CR1 = 0x80; // fast push pull mode

PE_DDR = 0x80; // direction output for led

 PE_CR1 = 0x80; // fast push pull mode

TIM1_PSCRH = 0x3e;

TIM1_PSCRL = 0x80;

TIM1_ARRH = 0x3e; 

TIM1_ARRL = 0x80;

TIM1_CR1 = 0x81;

TIM1_IER = 0x01;

  _asm("rim\n");

while(1)

{

if (count == 1000)

{

PE_ODR ^= 0x80;

count = 0;

}

}

}

    This topic has been closed for replies.
    Best answer by Tesla DeLorean

    Set PSCR = 16000-1 and ARR = 1000-1

    3 replies

    Graduate II
    September 24, 2019

    What frequency is it clocking?

    16,000,000 / (16,000 * 16,000) = 0.0625 Hz

    0.0625 / 1,000

    = 0.0000625 Hz, so perhaps toggle PE7 every 16000 seconds?

    VSrinAuthor
    Visitor II
    September 24, 2019

    Can you please explain this calculation?

    I thought 16000000/16000 = 1000hz

    1/1000 = 0.0001 seconds

    So i used for variable "count" increment and compare for every 1000 times.

    Please correct me if i am wrong

    Graduate II
    September 24, 2019

    >>Can you please explain this calculation?

    ARR and PSC both describe division counters. Arguable N-1 values, but I was illustrating scale of failure.

    Clearly it is wrong, you've already stated it doesn't work as expected

    Try

    TIM1_PSCRH = 0x00;

    TIM1_PSCRL = 0x00;

    TIM1_ARRH = 0x3E; 

    TIM1_ARRL = 0x7F;

    VSrinAuthor
    Visitor II
    September 25, 2019

    My timer works in this configuration but still i need to know how the calculation in the timer works,

    TIM1_PSCRH = 0x00;

      TIM1_PSCRL = 0x80;

    TIM1_CR1 = 0x11;

    TIM1_EGR = 0x01;

    TIM1_IER = 0x01;

    Graduate II
    September 25, 2019

    UPDATE RATE = TIMCLK / ((PSCR+1) * (ARR+1))

    VSrinAuthor
    Visitor II
    September 25, 2019

    In the manual, it is mentioned as ***_CNT = ***_PSC/(PSCR[15:0]+1). Maybe I got confused

    VSrinAuthor
    Visitor II
    September 25, 2019

    Thank you so much, in my previous configuration I did not change the arr values according to the program. So, there was a miscalculation. Now it works. I have one small clarification where did you find the equation for timer interrupt generation? I cannot find in the reference manual, I use stm8l152c6 mcu

    Graduate II
    September 25, 2019

    Counters, both for the timer, and the clock prescaler act as dividers. The math and concepts are fairly pedestrian, and diagrammed in the documentation for the timer.

    In silicon the "end state" can be implemented with a comparator, so be sensing the current state is N-1, the next state can reset the count to 0

    0 thru N-1 has N states.

    UPDATE RATE = TIMCLK / ((PSCR+1) * (ARR+1))

    UPDATE RATE = (TIMCLK / (PSCR+1)) / (ARR+1) // Alternate expression of the same math

    If it is easier think of it as a factoring problem, there are multiple workable solutions

    UPDATE RATE = TIMCLK / (Q * P)

    or

    UPDATE RATE = (TIMCLK / Q) / P

    Where PSCR = Q-1 and ARR = P-1