SPI reading issues

[Amal Babu]

i have configured the spi in stm8l controller.I have attached the code below:

void SetupSPI()

{

PB_DDR |= BIT(6) | BIT(5) ; // mosi and sck as output.

PB_DDR &= ~BIT(7); // miso as input.

PB_CR1 |= BIT(7);

PB_CR1 |= BIT(6)| BIT(5) ; // mosi and **** as push pull state for spi

PB_CR2 |= BIT(6)| BIT(5); // enable fast mode 

SPI1_CR1 = 0xBD;     // Disable spi ,set clock phase and polarity,Capture LSB on first edge ,set baud_rate(fSYSCLK/64),configure as master 

SPI1_CR2 = 0x03; // Enable 2-line unidirectional data mode ,full duplex mode,Software slave management,Internal slave select as master

SPI1_CR1 |= BIT(6); // Enable spi .

}

//Function to perform spi write

void Spi_write(char *address,int length)

{

  int index;

  int collect;

  for(index=0 ; index < length ; index++)

{

SPI1_DR = *address++;          // write data to be transmitted to the SPI data register

while(!(SPI1_SR & 0x02));      // wait until transmit complete

while(!(SPI1_SR & 0x01));      // wait until rx buffer loaded

collect = SPI1_DR;          // Store received temporary data .

  }

}

//Function to perform spi read

int Spi_read(int data_register)

{

int temp = 0;

SPI1_DR = 0x00 ;        // Send over SPI to Slave

while(!(SPI1_SR & 0x02));   // TX buffer ready?

while(!(SPI1_SR & 0x01));    // RX Received?

temp = SPI1_DR ;

return temp; // Store received data

// *data_register++ = SPI1_DR ;   

}

i verified the code by probing the mosi and clock during write operation and found it working properly, but reading deosnt seen to work.i confirmed the same by reading the manufacturing id of flash ic. Why is that so?Please share your suggestions about this issue.

[S.Ma]

Do you SW manage NSS signal? Confirm it's a 4 wire interface?

I would move the test of TX Buffer ready before writing DR:

The first byte write to DR will almost be pushed to the shift register to be sent out, and DR maybe nearly instantly ready to receive the next byte to be sent later. It might be that the DR you will read is 1 byte delay. Do you confirm the MISO pin is properly wired to the SPI peripheral?

There are already few fresh posts around this topic.

[Amal Babu]

i have ENBALED SSM bit and have configured SSI bit to master mode.I have connected the chip select pin of slave to stm via a GPIO and have configured it as output.When ever i communicate with the peripheral the pin is pulled low.I have configure MOSI AND CLK in output pushpull mode & Fast Mode.MISO is configured as input.My intention is to read the manufacturing id of an FLASH IC.The command is 0X90,0X00,0X00,0X00 and the manufacturing ID to be read is 0XEF.But i am continosly reading 255 or 256 even if it is not connected.

while(1)

   {

            PA_ODR &= ~BIT(2) ; //set cs low

            while(!(SPI1_SR & 0x02));                             

            SPI1_DR =0X90;

            while(!(SPI1_SR & 0x01));           // wait until rx buffer loaded   

            collect = SPI1_DR;

            while(!(SPI1_SR & 0x02));   

            SPI1_DR =0X00;

            while(!(SPI1_SR & 0x01));           // wait until rx buffer loaded   

            collect = SPI1_DR;

            while(!(SPI1_SR & 0x02));

            SPI1_DR =0X00;

            while(!(SPI1_SR & 0x01));           // wait until rx buffer loaded   

            collect = SPI1_DR;

            while(!(SPI1_SR & 0x02));

            SPI1_DR =0X00;

            while(!(SPI1_SR & 0x01));           // wait until rx buffer loaded   

            collect = SPI1_DR;

            while(!(SPI1_SR & 0x02));

            SPI1_DR =0X00; //write dummy byte

            while(!(SPI1_SR & 0x01));           // wait until rx buffer loaded   

            manufactur_id = SPI1_DR;

            PA_CR1 |= BIT(2) ;                       /set cs high

}

Please note that after writing each byte to the Peripheral , data register is read and stored to a variable "collect". After sending Command to read manufacturing ID.After writing a dummy byte to the DR register the manufacturing ID is read.Still my reading is 255 or 256.Why is that so?Please share your suggestions about this issue.

[Amal Babu]

Please can you throw some light on this statement "The first byte write to DR will almost be pushed to the shift register to be sent out, and DR maybe nearly instantly ready to receive the next byte to be sent later. It might be that the DR you will read is 1 byte delay".

[S.Ma]

Have you made sure of SPI clock polarity/phase and bit order? Bit 7 -> 0 or bit 0 -> 7?

This is very important to make sure the SPI lines timing diagram looks valid.

Capture on the oscilloscope the waveform and check it looks fine.

[Amal Babu]

Hai,

Thankyou for your support.Actually i found out the issue.It was due to difference in clock frequency of SPI.