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Visitor II
September 20, 2019
Question

ST Visual Programmer - setting the PC register before 'RAM Exec'

  • September 20, 2019
  • 4 replies
  • 1423 views

Hi,

There is an option of executing the code in RAM through the option 'RAM Exec' in ST Visual Programmer. I tested this feature and it looks like the code is starting from address 0.

I wonder if I can change this and set different starting address.

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I studied the UM0470 document where the SWIM protocol is described and see::

After a DM break, the CPU is stalled (through the EMU_Stall signal). While the CPU is stalled, the SWIM can read/write any memory location or any memory mapped register. The program can be continued from the breakpoint, by resetting the stall bit.If a change of PC is needed, the SWIM must write the new PC value using the method described in Section3.7: CPU register access on page16. In order to fetch the code from the new PC address, the SWIM must set the FLUSH bit in the DM control/status register 2 (DM_CSR2) (refer to Section4.12.10 on page 33) before resetting the STALL bit.

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So is there any way to set the PC in advance in ST Visual Programmer? Or maybe there are some rules how the PC is set. Need to test with different memory map than regular 'start from address 0' approach.

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    4 replies

    Visitor II
    September 20, 2019

    Found something about fixed address in the release notes:

    'Added RAM execution feature in ISP programming mode for all ST72Cxxx devices.

    There is a restriction on ram mapping, the program to execute in ram must start at address 0x90 and must not exceed address 0x17F'.

    I cannot confirm this - my programs start from 0.

    Still looking for any documents covering this topic - hoping that someone from ST team can share this information.

    Visitor II
    September 20, 2019

    When you look into the ST Programmer log you see that the address used for PC is always 0:

    Execute a file in RAM: Begin

    Execute a file in RAM: Reading file C:\Users\abg015\Desktop\STM8\DEV\cosmic-test\test1.hex

    Execute a file in RAM: Checking hardware and device

    Cut Version and Revision of device: 1.2

    Execute a file in RAM: Loading file in RAM

    Execute a file in RAM: Start program in RAM at Addr 0x0

    Execute a file in RAM: Execution on going, press OK to Stop

    Execute a file in RAM: Device under Reset

    Execute a file in RAM: End

    Visitor II
    September 20, 2019

    I'm not sure what ST Visual is doing, but executing code from RAM is as simple as loading your code into RAM at a certain address and than do a jump to that address.

    So, probably the linker is building the code for RAM execution at that address (0x0000) because it's free. Maybe you need to instruct the linker to build it for a different address (couldn't say how, I don't use ST Visual), or, if you just reserve the RAM from 0x0000 to where you want it to begin execution, it will offset the address automatically.

    Visitor II
    September 20, 2019

    I configured the linker to generate code in RAM area at 0x0010 (BTW. I use Cosmic C Compiler) and loaded the hex file to run it from RAM. The ST Visual still executes it from address 0x0 - so it look like it assumes 0x0 and ignore the first hex record containing the address/content.

    Graduate II
    September 20, 2019

    In Intel .HEX files it is usually the next-to-last record that contains the entry point, the last being a terminal record.

    Assemblers typically use an " END EntryPoint" format, ARMASM has an ENTRY directive.

    Visitor II
    September 20, 2019

    Yes. I use intel-hex generated by the Cosmic without any modification.