Att. is my Schematic diagram. I test results as follows: 24MHz fault 20MHz good 18.432MHz good Who can tell me why 24MHz is not work? Thanks a lot! regards wolver
I do not understand “select 1 waitstate�... Could you write source code show me or tell me what page in datasheet? Thanks! Regards wolver PS: My start some code as follows: void main(void) { _asm(''sim\n''); delay_ms(50); system_init(); poweron_init_part(); InternalSRAMDataInit(); _asm(''rim\n''); put_char('O'); put_char('K'); ModifyCurSystemStatus(NO_CORE_SUPPLY_MCU_IDLE_STATUS); while(1) { ProcessADCKeyValue(); ProcessBitStreamInfo(); ProcessIICRece(); } } void system_init(void) { CLK_ECKR = 0x03; CLK_SWCR = 0x02; // Enable switch. CLK_SWR = 0xB4; // HSE as the master clock. while(CLK_SWCR & 0x01); // Waiting for switch ok. SimIrD_Output(); // PD0 #if 0 CLEARIO(); PD_CR1 |= 0x01; // set output high #endif SETIO(); }
Refer to OPT7 description in datasheet page 35. To set the wait state option byte you should enter in Debug mode and in the MCU Configuration window set the option ''Flash wait states'' Regards mozra