STM8S Cannot write to TIM2->CCMR

[fraser]

Posted on April 26, 2012 at 18:51

Hi, I have just recently started developing with the STM8S003F3P TSSOP20 device. I have been working through a number of peripherals, which have gone fine, but have now run into a roadblock. I am using the STVD with Raisonance toolset. 

What I am trying to do is get 2 PWM signals on the pins 1 and pin 20, that is TIM2_1 and TIM2_2. I noticed right off the bat that when using the firmware libraries, the PWMs didnt come up, so i tried to do a few different implementations and none seem to be able to make the PWMs go. So after investigating the address values for the configurations (located at base address 0x5300) i noticed that CCMR1 and CCMR2 are not getting set at all. These are at location 0x5305 and 0x5306. Even when i set the values directly and step through, right after the instruction completes, the value at those addresses remain unchanged. I thought the chip might be faulty so i tried it on a few different ones and all the same result. So im officially stuck and need help. I am wondering if anyone has seen this or knows what I am doing wrong.

The chip is functioning correctly because on the same device, (same setup etc) i have been able to get SPI and the EncoderMode on TIM1 functioning perfectly. It just seems to be TIM2 that wont let me configure correctly. 

Two example implementations i have done are as follows....

addresses defined:

#define mCCMR1 (*((vu8 *) (0x5305)))

#define mCCMR2 (*((vu8 *) (0x5306)))

#define mCR1 (*((vu8 *) (0x5300)))

and then in main i have:

TIM2->PSCR = 0x00;

TIM2->ARRH = 0x03;

TIM2->ARRL = 0xE7;

TIM2->CCR1H = 0x01;

TIM2->CCR1L = 0xF4;

TIM2->CCR2H = 0x01;

TIM2->CCR2L = 0xF4;

TIM2->CCER1 = 0x33;

mCCMR1 = 0x68;

mCCMR2 = 0x68;

mCR1 = 0x01;

In this version, CR1 gets sets correctly but CCMR1 and CCMR2 do not, they remain at zero.

Another implementation was:

TIM2_DeInit();

TIM2_TimeBaseInit(TIM2_PRESCALER_1, 999);

//Channel 1 - IN1

TIM2_OC1Init(TIM2_OCMODE_PWM1, TIM2_OUTPUTSTATE_ENABLE,CCR1_Val, TIM2_OCPOLARITY_LOW);

  TIM2_OC1PreloadConfig(ENABLE);

  //Channel 2 - IN2

  TIM2_OC2Init(TIM2_OCMODE_PWM1, TIM2_OUTPUTSTATE_ENABLE,CCR2_Val, TIM2_OCPOLARITY_LOW);

  TIM2_OC2PreloadConfig(ENABLE);

TIM2_ARRPreloadConfig(ENABLE);

TIM2_Cmd(ENABLE);

and the same result happens here, all the configuration registers seem to get written appropriately except for CCMR1 and CCMR2.

Any input at all would be helpful, thank you in advance!!

[jdf25252]

Posted on April 27, 2012 at 16:45

It looks like you're using the wrong addresses for CCMR1 & CCMR2

according to the datasheet (DM00024550.pdf) CCMR1 is at 0x5307 & CCMR2 is at 0x5308.

0x5305 is SR2 & 0x5306 is the EGR

I don't use the hardware library (or the 003 - didn't even know there was one) so my copy of ''stm8s.h'' is pretty old so I can't check to see what addresses the latest version uses.

My copy is -

  * @version V1.1.0

  * @date 02/27/2009

Note in the definition of TIM2 there is a #ifdef STM8S103

You should check to see if there's a version available that accomodates the 003

typedef struct TIM2_struct

{

  vu8 CR1;   /*!< control register 1 */

#if defined STM8S103

    vu8 RESERVED1; /*!< Reserved register */

    vu8 RESERVED2; /*!< Reserved register */

#endif

  vu8 IER;   /*!< interrupt enable register */

  vu8 SR1;   /*!< status register 1 */

  vu8 SR2;   /*!< status register 2 */

  vu8 EGR;   /*!< event generation register */

  vu8 CCMR1; /*!< CC mode register 1 */

  vu8 CCMR2; /*!< CC mode register 2 */

  vu8 CCMR3; /*!< CC mode register 3 */

  vu8 CCER1; /*!< CC enable register 1 */

  vu8 CCER2; /*!< CC enable register 2 */

  vu8 CNTRH; /*!< counter high */

  vu8 CNTRL; /*!< counter low */

  vu8 PSCR;  /*!< prescaler register */

  vu8 ARRH;  /*!< auto-reload register high */

  vu8 ARRL;  /*!< auto-reload register low */

  vu8 CCR1H; /*!< capture/compare register 1 high */

  vu8 CCR1L; /*!< capture/compare register 1 low */

  vu8 CCR2H; /*!< capture/compare register 2 high */

  vu8 CCR2L; /*!< capture/compare register 2 low */

  vu8 CCR3H; /*!< capture/compare register 3 high */

  vu8 CCR3L; /*!< capture/compare register 3 low */

}

TIM2_TypeDef;

Have fun!

[fraser]

Posted on April 27, 2012 at 21:25

Thank you, you are right about the wrong addresses. It turns out my stm8s.h had me configured for the STM8S208 instead of the 103. That in turn did not add in the two extra reserved registers i needed. So all of my registers in timers 2,3,5 were offset by 2. That is why the hardware libraries didn't work either. And i had myself convinced the address for CCMR1 was 0x5305  because the reference manual says the offset could be either 0x05 or 0x07, but doesnt really say why, and the link in the reference manual that helps you choose which one you need is broken for me. 

At any rate, thanks for the help. This teaches me to be more careful in the future. Its a miracle i managed to get timer1 encoder working having the wrong MCU defined.