STM8S103F TIM1 CLK_PSC and CLK_CNT frequency not matching

[frupi2]

Posted on March 09, 2010 at 15:36

STM8S103F TIM1 CLK_PSC and CLK_CNT frequency not matching

[lowpowermcu]

Posted on May 17, 2011 at 15:07

Hi franco,

You said that your signal is 10msec width but with your clock config 16MHz and prescaler = 0, the TIM1 overflows at 65553 so within 65535/16000000 = 4.09 ms. Perhaps you should use a greater precaler or greater value of input capture divider (TIM1_ICPSC_DIV2,...).

I have found an example in FWLib/examples/TIM1/TIM1_Input_Capture that could help you. (It is was useful for me when I started using timers in STM8S)

Tell me if it is OK now

With regards,

be low power

[kkarasti]

Posted on May 17, 2011 at 15:07

I have figured out that this too is my problem, but using your suggestions, I can't get it fixed. I've tried adjusting the HSIDIV and the TIM1_ICPSC_DIV to no avail. Wouldn't making the ICPSC_DIV higher make it possible to capture faster signals, not slower? Or is my mind working backwards? I say this because the TIM will overflow more often with longer times between edges, i.e. slower freqs.

    CLK_DeInit();

    /* Configure the Fcpu to DIV1*/

    CLK_SYSCLKConfig(CLK_PRESCALER_CPUDIV1);

    /* Configure the HSI prescaler to the optimal value */

    CLK_SYSCLKConfig(CLK_PRESCALER_HSIDIV1);

    /* Output Fcpu on CLK_CCO pin PE.0*/

    CLK_CCOConfig(CLK_OUTPUT_HSI);

    CLK_CCOCmd(ENABLE);

               

    /* Initilize the Clock controller according to CLK_InitStructure 24MHz */

    status = CLK_ClockSwitchConfig(CLK_SWITCHMODE_AUTO, CLK_SOURCE_HSE, DISABLE, DISABLE);

    while (CLK_GetFlagStatus(CLK_FLAG_HSERDY) == 0);

  TIM1_ICInit( TIM1_CHANNEL_1, TIM1_ICPOLARITY_RISING, TIM1_ICSELECTION_DIRECTTI,  TIM1_ICPSC_DIV8, 0x0);