Timer 2 - One pulse mode

[sylvain_laurent]

Posted on February 02, 2011 at 10:24

Timer 2 - One pulse mode

[brazov22]

Posted on May 17, 2011 at 15:11

please ensure you have not erroneously set option bit ADC_ETR [AFR0].

brazov

[sylvain_laurent]

Posted on May 17, 2011 at 15:11

Hi brazov,

Thanks for your response.

I haven't touch this option byte.

This is my code for TIM3.

Code with TIM3:

 

TIM3_DeInit();

TIM3_TimeBaseInit(0,150);

TIM3_OC2Init(TIM3_OCMODE_PWM1,TIM3_OUTPUTSTATE_ENABLE,1,TIM3_OCPOLARITY_HIGH);

 

   

 

TIM3_ICInit(TIM3_CHANNEL_1,TIM3_ICPOLARITY_RISING,TIM3_ICSELECTION_INDIRECTTI,0,0);

/* TIM3_CCxCmd */

 

TIM3->CCER1 |= (u8)TIM3_CCER1_CC1E;

/* TIM3_SelectOnePulseMode */

 

TIM3->CR1 |= (u8)TIM3_CR1_OPM;/* TIM3_Cmd */

 

TIM3->CR1 |= (u8)TIM3_CR1_CEN;

 

 

Regards.

 

Sly

 

[brazov22]

Posted on May 17, 2011 at 15:11

is it TIMER2 or TIMER3 .... anyway:

// *** TIMER 2 INITIALIZATION ***

TIM2->CCMR1= 1 & TIM1_CCMR_CCxS; // IC1 input is mapped on TI1FP1

TIM2->SMCR|= (5<<4) & TIM2_SMCR_TS; // edge on TI1FP1 will make a TRGI

TIM2->SMCR|= (6<<0) & TIM2_SMCR_SMS; // trigger mode (counter starts at rising edge of the TRGI)

TIM2->SMCR|= (1<<7) & TIM2_SMCR_MSM; // enable master slave mode

TIM2->CCR2H= (u8)(OUTPCOMPARE >> 8); // init pulse wide - compare register

TIM2->CCR2L= (u8)(OUTPCOMPARE);

TIM2->ARRH= (u8)(AUTORELOAD >> 8); // init auto reload register

TIM2->ARRL= (u8)(AUTORELOAD);

repet= REPETITION; // repetition counter setting

TIM2->RCR= repet-1;

TIM2->EGR= TIM2_EGR_UG; // update registers

TIM2->CCMR2= (7<<4) & TIM2_CCMR_OCM | TIM2_CCMR_OCxPE; // OC2PWM 2 output compare mode

TIM2->CCER2= TIM2_CCER2_CC2E; // OC2 enable output pin

TIM2->BKR|= TIM2_BKR_AOE; // automatic enable outputs

TIM2->CR1|= TIM2_CR1_OPM; // one pulse mode

TIM2->CR1|= TIM2_CR1_CEN; // TIM2 enable

[brazov22]

Posted on May 17, 2011 at 15:11

yes, you're right I was able to do it only with TIM1 see Reference Manual pag.173. Is there someone who succedded in doing it with TIM2/TIM3?

brazov

[sylvain_laurent]

Posted on May 17, 2011 at 15:11

So I try to compile your code but it doesn't work because SMCR and BKR registers doesn't exist with TIMER2 or 3.

So your code is unusable.

Thanks.