TLI problem

[carlo23]

Posted on June 07, 2010 at 12:25

TLI problem

[Olga DIAMANTE]

Posted on May 17, 2011 at 15:09

You need just to invert instruction order:

    PD_DDR = 0x2D;                  \* PD7 input       *\

    PD_CR1 = 0x2D;                   \* PD7 floating   *\

    EXTI_CR1 = 0x48;               

    EXTI_CR2 = 0x06;                \* set rising edge on TLI *\

    PD_CR2 = 0x80;                    \* PD7 interrupt *\

It is reported in the RM:

TLIS: Top level interrupt sensitivity

This bit is set and cleared by software. This bit can be written only when the external interrupt is disabled on the corresponding GPIO port (PD7).

0: Falling edge.

1: Rising edge Regards,

  Olga

[carlo23]

Posted on May 17, 2011 at 15:09

Thank you very much Olga.