STM32 MCUs Products

Dear Sir,We are facing an issue while bringing up the STM32 microcontroller (part number: STM32H747XIH6) using the internal SMPS.When we power the MCU through the LDO path, everything works fine, and we are able to connect to the STM32 via JTAG. However, when using the internal SMPS, the MCU does not respond and we are unable to establish a connection through JTAG.We have attached the relevant portion of the schematics for your reference.Could you please help us identify the issue with the internal SMPS configuration?  Best Regards,Samudralankaiah.

I am trying to periodically transfer data to the first byte of GPIOA (PA0-PA7) using DMA Channel 1 and TIMER1, but am hitting a transfer error immediately after enabling the DMA channel for transferring. * I can write to GPIOA->ODR using the CPU and I've confirmed the output on a scope, so the GPIOA timer is enabled and the pins are set as outputs.* I am able to confirm that TIMER1 is running at ~20Khz, because it is able to toggle its associated GPIO pin (PA8) at the desired frequency. This is plenty low compared to the system frequency, which is north of 16Mhz (not sure exact value, PLL is enabled)* I believe the DMAMUX is connected correctly because if I disable the timer, no transfer error shows up for DMA ch 1 ISR and NDTR doesn't change (as expected).* I've confirmed the peripheral address is set to 0x50000014, which lines up with GPIO->ODR.* I've confirmed the memory address is set to 0x20001F60, which lines up with the buffer on the stack.* NDTR is non

Hello,I would like to design a microphone array with up to 16 microphones. I want to use the stm32h7a3zi board which has a lot of peripherals.I was looking at the DFSDM interface, but with only 8 channels / 8 filters up to 8 pdm microphones can be handled.On the contrary, the SAI interface seems to be more promising. If I understood correctly, the SAI interface can be configured as PDM interface, and every SAI can handle up to 6 microphones. Moreover, the SAI interface supports synchronization between SAIs modules. Do you have suggestion/comments? 

Hello,Im working on a program which sends data from the ADC to the computer. My problem is that the data from my STM32H563ZIT6 is bad. I first noticed this from looking at the data sent from the computer and confirmed this by outputting the ADC data through the DAC. Attached is the output from a 50Khz sine wave. I am not sure what is causing this stair stepping pattern. For reference I have the ADC clock at 75Mhz, 6.5 cycle sample time, and triggered by a 1Mhz timer.I did notice that the data in the buffer seemed to be mostly shifted left 4 bits (though it never goes above 4095) or is missing the first 4 LSBs. I ran the same program on an STM32F303RET6 and got the expected output from the DAC.What am I missing that could be the cause of this oddity? Attached is the H563 program which exhibits this behavior.Thank you!   

I found an application note which goes in depth on DMA transfer speeds and clocking for F7 chips, but haven't been able to find anything similar for H7 chips. I have a few questions:How are each of the DMA controllers clocked on an H7xx chip? My assumption is MDMA is on the AXI clock and DMA1, DMA2 and BDMA are on the AHB clock. Is this correct?How would I go about calculating the worst-case latency for a memory-to-memory transfer by a given DMA controller from a given location in memory to another (in the same bank, or a different one)? How much latency does each domain link add, and do the H7 memory buses follow the same round robin allocation scheme described in the F7's application note? For example, if I were transferring 1 word of data from SRAM1 to AXI SRAM, how long would it take using each of the BDMA, DMA1, and MDMA controllers? 

Hello, We use STM32H755 with a 25MHz crystal oscillator connected to OSC32_IN and OSC32_OUT OSC_IN and OSC_OUT pins. Probed on the bench, I see a sine wave with a DC offset and low amplitude. Can you comment if the attached waveform looks okay? My expectation was that the sine wave would swing from 0V to around 3.3V, and that there should be no added DC offset.  Thanks!

Hi,I´ve a application (with RTOS) where I do a FW update via the internal UART bootloader (BOOT0 pin method).After flashing is finished I set the Boot0 to GND and toggle the reset pin. The application starts, but I don´t get USART interrupts any more.After Power cycle interrupts are working again.Any idea?Best regards,Achim

Dear Community, i got two interconnected questions, as i want to build a measurement system that measures and generates sine signals and multi-sine signals with frequencies of up to 1 MHz. For this task i would like to have 10MSPS DAC and ADC acquisition. I thought about multiple ways of doing it and would like to hear your thoughts:Just do it all in analog and build a simple lock in amplifier and use an external  signal generator icThis would be the method i am currently using but it is fairly limited as it can only generate one frequency at a time or i would have to scale up the analog side.Use the build in ADCs and DACs to generate and measure the signals. The ADC of the G474 is 4MSPS at max res.  would be < 8MSPS in alternating trigger mode.Could i use the HRTIM to trigger all ADCs alternating to generate even higher sampling rates?Would the DMA be able to handle that? Do i tie all pins together or give everyone a separate opamp to circumvent sampling no

LTDC prevents CPU (of my MCU) from going into sleep mode. When i deactivate the LTDC clock, the CPU goes to sleep mode. LTDC interrupt is enabled trough IOC, without enabling of LTDC interrupt, screen remains black. I use the following MCU: STM32L4P5ZGT6P, IDE: STM32CubeIDE 1.11.2. Does someone know why this happens? An extract of my code:/* Clock of used hardwares on MCU is deactivated. */ __HAL_RCC_DMA1_CLK_DISABLE(); __HAL_RCC_I2C1_CLK_DISABLE(); __HAL_RCC_OSPI2_CLK_DISABLE(); __HAL_RCC_TIM6_CLK_DISABLE(); __HAL_RCC_TIM2_CLK_DISABLE(); __HAL_RCC_TIM3_CLK_DISABLE(); __HAL_RCC_USART2_CLK_DISABLE(); __HAL_RCC_UART4_CLK_DISABLE(); __HAL_RCC_UART5_CLK_DISABLE(); /*Suspend Tick increment to prevent wakeup by Systick interrupt. Otherwise the Systick interrupt will wake up the device within 1ms (HAL time base)*/ HAL_SuspendTick(); //CPU shall enter sleep mode after this instruction HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFE); HAL_ResumeTick(); //Once HAL_R

Hi,We have a customized board with STM32F103, it measures water level and sends the data to a server, and then enters into Standby mode for 1 minute after setting up a RTC alarm for wakeup. Occasionally, we see wakeup failures. This happens randomly, it could be once after running for thousands of minutes, or could be once for hundreds of minutes.Any ideas ? And is there any way to check the reason why it happens?Any replies would be highly appreciated.Chao

Hi I am working on a project with STM32H730IBK6Q and STM32Cube IDE 1.16I am trying to use PA0_C as a GPIO, but the GPIO function is not connecting properly. PA0 is used an ADC, not as a GPIO, so from how I understand muxing there should be no conflict. But when I try to use PA0_C it reads a static value, even after I confirm connectivity. How do I properly configure my project to use PA0_C as a gpio? From the datasheet I got this cryptic instruction:Analog switch between ports Pxy_C and Pxy PA0_C, PA1_C, PC2_C and PC3_C can be connected internally to PA0, PA1, PC2 and PC3, respectively (refer to SYSCFG_PMCR register in RM0468 reference manual). The switch is controlled by VDDSWITCH voltage level. It is defined through BOOSTVDDSEL bit of SYSCFG_PMCR. If the switch is closed the switch characteristics are given in the table below.But nothing about what VDDSwitch is connected to physically or how to activate the pin properly in MX. CubeMX doesn't throw any er

Hi ST Community, I’m working on a secure boot implementation for the STM32U3 series and need to replace the factory ROM bootloader with my custom secure bootloader. Here’s what I’d like to clarify: Can We Fully Remove the Factory Bootloader?The STM32U3’s ROM bootloader (System Memory) is in masked ROM, so is it even possible to erase or disable it completely?If not, what’s the most secure way to bypass it and ensure the MCU always boots from my custom bootloader in Flash?

Hello,I am using STM32G0B1cbt6. And I am using native bootloader to update firmware. But in some boards not able to update firmware, it is giving below error:And when we replaced the MCU then bootloader started working normally. The failure percentage is like out of 100, in 5 to 10 MCUs we are facing problem. What could be the reason? And how it can be resolved?This is a custom board.I am attaching the schematic below. Which running on standard 3.3V supply.  Is there any way to check if the bootloader is corrupted and if corrupted is there any way to reprogram it? I have tried the below methods and no resolution found.Remount same MCU: Some started working, some not workingReplaced new MCU: Some started working, some not workingBoot 0 pin HIGH at startup: Some started working, some not workingBoot 0 pin LOW at startup: Some started working, some not workingNRST pull up resistor removed: Some started working, some not workingConnected ST Link programmer and trie

I'm trying to get the DMA engine to trigger transfers on TIM8_CH1 (DMA Request Mapping:  Channel 7, Stream 2). However, it's not working. I verified that the TIM8_CC1 looked good by driving it to an alternate function output.  Then, all I changed was the DMA Request Mapping stream number: Channel 7, Stream 3, to select TIM8_CH2, and setup TIM8_CC2 instead of TIM8_CC1. Surprisingly this worked, and DMA is running as expected. I then setup both TIM8_CC1 and TIM8_CC2 with the same settings, routed both to GPIO pins using alternate function outputs, and looked at both signals on an oscope: They are completely identical. The only difference is setting up the DMA for TIM8_CH1 (stream 2) vs TIM8_CH2 (stream 3). For whatever reason, TIM8_CH1 (stream 2) doesn't work even though TIM8_CC1 is running. Any ideas?

Does anyone know if the PGA OpAmp in the STM32 has the ability to interface with a differential input - like a Strain Gauge Wheatstone bridge?  I'm not convinced its going to work because my signal is going to swing +/-50mV, and the OpAmp does no look like it can handle a differential input.  There's probably some jiggly pokery that can be done to condition it externally, just wondered if anyone has any experience before I go down that route myself.

We are using STM32H743 Controller in one of our LRU (Line replaceable unit).Since February end, The LRU System Test equipment cannot load the programming (.bin ) file to many units. This is the first time this specific failure mode has appeared. This is also the first time that any kind of OPS programming failure has appeared that isn't an operator or facility issue.We have tried loading the  .bin file using STM32Cube programmer as well but still the issue exists.We have recently come across this PCN where Bootloader version of 9.1 is Changed to V9.2 resolving abnormal data output on the USART1_TX PB14.We are using USART3_TX on PB14 and USART3_RX on PB11.  Do you think OPC bootloader V9.1 to V9.2 has any impact on USART 3 interface used for RS-232 ?Note , once we replace the STM32 IC with the old batch code , this issue is resolved. More details :Here are our connections.USART1_TX : PB14 (PULL DOWN 100K), series resistor 47 ohms.USART1_RX :PB15  (PULL DOWN 100K ) se

Hi,I have an issue on MIPI Display with our custom board, information as below, Core: STM32U599NJH6Frame Buffer Address: 0x200D0000 (Internal SRAM)MIPI Driver : ST7797Resolution: 400*400Reference example : STM32Cube_FW_U5_V1.6.0\ STM32U5x9J-DK\ DSI_VideoMode_SingleBufferI have noticed  that example code is the same MIPI command and also LTDC timing as mine.And I set as the same ,but still not display anything. So I checked few things, DSI_Dn/Dp signal in scope are the same polarity (It should be differential signal)> PCB layout & Schematic both design in correct. And Dn/Dp is in correct impedance.> There is a saying, no display or Black  will show the same polarity, is it correct?In example code, there are two different CMD(SetPanelConfig, mipi_config).> After set with mipi_config, there is no change on display and same polarity.> After set with SetPanelConfig, display appear stripe but same polarity. If it is correct of my understandi

Greetings,During the power-on and power-off processes of the STM32F407 chip, the GPIO used as the DAC output will be pulled high for 8ms. The goal is that the GPIO should remain low when there is no DAC output. Adding an external pull-down resistor has an effect but cannot completely eliminate it. It was not present during online debugging, only occurring when there was a power surge. After erasing the program, it still existed. Preliminary judgment is that it is a hardware issue. Is there any way to solve this problem?Thank you so much for the help. @KDJEM.1 @LPetr.1 @TDK     

Hi, We are working on railway projects where we are looking for SIL 2 microcontroller. As per our analysis we found out that we need to integrate the X-CUBE-STL package to make it to SIL 2compliance. And we have found out that it should have supported MCU's. As per our analysis the STM32H5 and STM32H7 series supports X-CUBE-STIL package. So, we wanted to know are the safety certified libraries available in this package to make it as SIL 2 compliance. Also, can you suggest if there are any SIL 2 certified microcontrollers available. Regards, Rajath

Hello,I updated my development kit with the example IOT_HTTP_WebServer from the example selector in STM32 IDE. Then I needed to upgrade the firmware on wifi module, which seemed to work. I think I can connect to wifi, but I cannot open a webpage when I paste the IP address, with all demonstrations for pressure, humidity, etc. The web page is searching and in the end I get a message the page cannot be found. What can this depend on? Yhe following is what I get on the Tera terminal when I sign in the network: Selected Access Point                          INS-GUEST ch  6 rss -48 Security   WPA2-AES country  .CN bssid 0a.8d.db.db.4c.2cC:/Users/xxxxxx my name here/STM32CubeIDE/workspace_1.18.1/IOT_HTTP_WebServer/WebServer/Target/net_interface.c:191 main ... 0x2000004c 0x20000c6c "xxx WIFI-NETWORK name here "- Network Interface starting:-

Hi, good morning to all. I'm in the process to design an application based on STM32U5G9ZJT6Q. My first question, please, is: is it possible to have this STM32 drive three different displays, and possibly have TouchGFX manage the whole three ?In my case I've:Display #1: Rotary 1.3" display (SPI interface, 240x240. IC GC9A01N). Connected to:STM32's SPI3-MOSISTM32's SPI3-SCKSTM32's general GPIOs for Chip Select and D/C SelectDisplay #2: Same type Rotary 1.3" display (SPI interface, 240x240. IC GC9A01N). Connected to:STM32's SPI1-MOSISTM32's SPI1-SCKSTM32's general GPIOs for Chip Select and D/C Select Display #3: 5" display (24 bit RGB interface, 800x480. IC ST7262-G4). Touch screen for user selection options. Connected to the STM32's dedicated 8xR, 8XG, 8XB, plus VSYNC, HSYNC, etc. Would this work ?Furthermore, second question, sorry: if I utilize MOSI and SCK dedicated pins on the STM32 (on SPI1 for example), can I utilize the other SPI1's pins of the same interface for ot

I've been struggling with a variety of issues with FreeRTOS/LWIP/DHCP/MDNS, before I've even got to implement my application code (which will be a UDP app). I've read all of the documents that have been linked in the forums, I've gone through the official ST example code (a lot of which conflicts with what the documents say...) and I'm at my wits end. I've seen issues constantly being raised in the forums, all to do with memory management. These issues date back many years and while things might be solved for one person at one point in time, there is no telling if a solution from 2019 or 2021 applies in 2025. In this issue I'm trying to show the simplest example of a failure and am looking for guidance to not only fix the issue, but understand it and avoid it in future situation.So, here we go:I have the STM32H735-DK and am working with CubeIDE and CubeMX. I have started with the official stm32hotspot example. I have made the following changes:Updated lwip.c to change the default

I'm writing a small HAL of my own for the STM32F1 and I noticed that sometimes the DMA would read in the wrong order for seemingly no reason. After several tests, I came up with this code: const std = @import("std"); const microzig = @import("microzig"); const RCC = microzig.chip.peripherals.RCC; const DMA = microzig.chip.peripherals.DMA1; const DMA_t = microzig.chip.types.peripherals.bdma_v1; const stm32 = microzig.hal; const timer = microzig.hal.timer.GPTimer.init(.TIM2); const uart = stm32.uart.UART.init(.USART1); const gpio = stm32.gpio; const TX = gpio.Pin.from_port(.A, 9); pub const microzig_options = microzig.Options{ .logFn = stm32.uart.log, }; const AdvancedADC = microzig.hal.adc.AdvancedADC; const ADC_pin1 = gpio.Pin.from_port(.A, 1); const ADC_pin2 = gpio.Pin.from_port(.A, 2); fn DMA_init(arr_addr: u32, adc_addr: u32) void { const CH1: *volatile DMA_t.CH = @ptrCast(&DMA.CH); CH1.CR.raw = 0; //disable channel CH1.NDTR.raw = 0; CH1.CR.modify(.{ .DIR = DMA_t.DIR.

Greetings,We have implemented a USB peripheral on the STM32G474RE discovery board using code that runs properly on the STM32WB and STM32F0 parts.  On the G474, the USB setup completes, but the USB bus quickly suspends after the completion of the configuration phase when the host receives descriptors.  We were able to fix this issue by disabling (not setting) the CRS_CR_CEN flag in the CRS module.  There are no samples of USB peripherals in the latest Cube release, so we don't have an easy way to share the running program.  We can setup HRTIM_PFC_TransitionMode which includes some USB code.In ./Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c you will find this  1561 void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit) 1562 { 1563 uint32_t value; 1564 1565 /* Check the parameters */ 1566 assert_param(IS_RCC_CRS_SYNC_DIV(pInit->Prescaler)); 1567 assert_param(IS_RCC_CRS_SYNC_SOURCE(pInit->Source)); 1568 assert_param(IS_RCC_CR

Hi,     We use NUCLEO-H753ZI.    Input signals to all ADCs are 60Hz/50Hz, the sampling clock is set as 5Mhz. The sample time is set to 12.clock cycles.    We found the cross talk (interference) between two ADC adjacent channels in STM32H753 assigned to two ADCs and sampled simultaneously.    Is it normal?   If it is normal, the the number of useable ADC channels would be cut to a half.   If it is not normal, how to make the corrections?   Thank you for your help,Rong