A Question on I2C Device in a Mixed I3C Bus
Hi, STM Experts,
Recently, we are investigating if STM-H5 MCU with I3C SDR support could meet our system requirement. We now have a following question, and hope get support from you.
In our system, there will be not only I3C devices but also I2C legacy devices which can work at 400Kbps or 1Mbps modes. As for legacy I2C protocol, mutli-master feature is supported so that any of the I2C device can start a communication transaction when a bus is in an idle state. Is this still true for an I2C device working on a mixed I3C bus i.e. the I2C device (target in I3C specification term) can start a communication transaction when the mixed I3C bus is in Bus Availiable State? Will STM-H5 MCU support such a use senario?
Thanks and Regards!
// JC1985
