ADC1 and ADC2 in Dual regular simulataneous mode with DMA and Timer
Dear ST trams,
I am using STM32H750 for a project. In the STM32CubeMX, I configured two ADCs in Dual regular simultaneous mode only. Also I am using DMA and a timer for trigger. I have activated 6 channel for each ADC. The sequencing of channels is as below:
ADC1: ch18 -> ch16 -> ch2 -> ch14 -> ch15 -> ch3
ADC2: ch10 -> ch4 -> ch2 -> ch5 -> ch9-> ch7
In the Keil debugging mode, when I am checking the ADC_BUFFER, I see that the sequence of channels is different. It seems that ADC2 sequence is shifted by one (like this: ADC2: ch7 -> ch10 -> ch4 -> ch2 -> ch5-> ch9 ). Could you please help me in this issue?
Could the problem is the clock prescaler?
Best regards,
Davood.
