Adjustable power outputs for Vddcore for STM32N6 using mosfet

[flexiglass]

In the schematic for STM32N6 Vddcore power rail (attached), voltages of 0.81V and 0.89V are output from the SMPS using resistor dividers. I understand how the output of 0.81V was achieved using the 56K and 160K resistors and formula from the SMPS datasheet, but I'm not clear how the 0.89V output was achieved when the third resistor of 422K was added in parallel when the n-channel mosfet is used. Can someone please share the formula/how this was calculated?

[Peter BENSCH]

Let's do the maths:

• The feedback voltage of U2 is 600mV.
• The upper resistance Rhi=R28 of the voltage divider is 56k. This results in for:
  • VDD=810mV: Rlo=R29 = Rhi/(VDD/VFB - 1) = 160k
  • VDD=890mV: Rlo=R29||R157 = Rhi/(VDD/VFB - 1) = ~115.9k

If Q7 places R157 (422k) in parallel with R29, this results in an Rlo of 116k and thus VDDCORE=889.6mV, which corresponds quite precisely to the target of 890mV.

Does it answer your question?

Regards
/Peter

[flexiglass]

Thank you Peter!