AN4776 Timer Cookbook - maximum input signal frequency

[waclawek.jan]

JW

[hdemi.1]

Did you solve the problem? @Community member​ 

[waclawek.jan]

No.

I didn't want to solve anything here, just expected ST to chime in with definitive information.

JW

[waclawek.jan]

I've just noticed also this:

 

JW

[waclawek.jan]

Hi @Imen DAHMEN​ ,

can please AN4776 be given some proper attention? See please also this thread, which seeks to have the asynchronous prescaler in ETR clarified (and figure fixed to match the related narrative).

Btw., are the CHx prescalers asynchronous, too? [EDIT answer to myself] no, you dumb, they are far inside and beyond the resync/filter block [/EDIT]

Thanks,

Jan

[waclawek.jan]

I of course understand the source of 2 vs 3 issue: strictly speaking, complete resync of Fext = Fclkint/2 signal is possible only if the external signal's duty cycle is exactly 50:50. However, Fclkint/3 does not guarantee full resync either without explicitly stating the duty cycle needed for that. It would be much better if these random formulae would be removed, replaced by a reference to a dedicated chapter, where the details of resync would be explained properly in terms of pulse length rather than frequency (which is then only the consequence, with implications to duty).

JW

[Sarra.S]

Hello @waclawek.jan, 

Thank you for bringing these issues to our attention, This will be taken into consideration in the ongoing process of updating the Cookbook. 

Your inputs are much appreciated!