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July 18, 2025
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Any STM32 with Split Power SPI Domains (1.8V & 3.3V IOs) ?

  • July 18, 2025
  • 3 replies
  • 402 views

I’m working on a design where I need to communicate with two SPI devices that operate at different logic levels:

1) A sensor running at 1.8v logic (need SPI + 2 other lines, all at 1.8v) 
2) Everything else on my board, preferably running at 3.3v, I will need CAN, UART, and another SPI. 

I’m trying to avoid level shifters if possible (and avoid sourcing 1.8 V CAN/UART transceivers). Ideally, I’d like to use an STM32 that has split power domains, both with SPI peripherals. 

So far, I’ve found that the STM32L496QI supports SPI on both the main VDD rail and the VDDIO2 rail (which can be independently run at 1.8 V), which fits the bill. The only issue is that it’s a 100-pin part, which is way more than I need for this design.

What I’m looking for:

  • STM32 with VDDIO2 or similar
  • SPI on both 1.8V and 3.3V-capable banks
  • Preferably 64 pins or less


Thanks, 

Sameer 

    This topic has been closed for replies.
    Best answer by Chris21

    It looks like STM32H503 devices can meet these requirements, but only in the WLCSP25 package.

    3 replies

    Chris21Answer
    Graduate
    July 18, 2025

    It looks like STM32H503 devices can meet these requirements, but only in the WLCSP25 package.

    Graduate
    July 18, 2025

    Looking at this a bit more, although the WLCSP25 package allows for CAN on some pins, it does not appear to have any high-speed clock input pins, which you probably need for CAN...

    sc123Author
    Explorer
    July 18, 2025

    Thanks for your help. 
    I'm kind of confused with your second reply, from what I can see in CubeMX, this chip supports FDCAN on pins PA11 & PB15, am I missing something? 

    Graduate
    July 18, 2025

    There's no OSC_IN pin for this package, CAN usually requires a precise and stable clock, better than what the internal clocks (HSI, CSI, LSI) can do.

    Chris21_0-1752865454369.png