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Graduate
February 23, 2024
Question

Can the rising signal 'hrtim_upd_en1' come directly from software?

  • February 23, 2024
  • 2 replies
  • 1232 views

Hallo,

I have to use shadow registers (PREEN=1) in HRTIM slave timers.

I have decided to use following configuration:

UPDGAT = 0110: the update occurs on the update event following a rising edge of HRTIM update enable input 1 (hrtim_upd_en1) to perfectly synchronise registry update after software command.

 

I want to evoke "hrtim_upd_en1" directly from software.

I hope that TIM16.EGR registry should allow it exclusively, even without running TIM16 counter.

Am I wrong?

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    2 replies

    ST Employee
    February 29, 2024

    Hello @DrDro,

    Thanks for your question!

    First, a short reminder : "when the preload mode is enabled, accessed registers are shadow registers. Their content
    is transferred into the active register after an update request, either software or synchronized with an event." (page 1545 of RM0399)

    You configured UPDGAT = 0110, the update is done on the update event following a request on the update enable input 1..3 (the event can be enabled with TxREPU, MSTU or TxU).

    If you want to update from software, I suggest you to directly write 1 into TxSWU bit in HRTIM_CR2.

    Best Regards,

    Pierre

    DrDroAuthor
    Graduate
    March 4, 2024

    Thank you, Pierre,

     

    yes, that is the easiest way using TxSWU.

    You have expresed here very clearly "update event" and "update request". This helps a lot to understand the logic behind. In RM it is not so obvious. Thanks a lot for this disambiguation.

    However, transfering shadow registers immediate on TxSWU is not good solution for me, I need a seguence: update on the update event (timer reset) following the request (software write).

    Greetings

    ST Employee
    March 4, 2024

    Hello @DrDro,

    When the preload is enabled (PREEN bit set), there are 3 use cases :

    1. The update is done independently from DMA burst transfers
    2. The update is done when the DMA burst transfer is completed
    3. The update is done on the update event following the DMA burst transfer completion

    If you want to update registers on the timer reset, you should have a look on this figure (especially the option 2) :

    Pierre_Paris_0-1709544411414.png

    Did I answer your question ? 

    Best Regards,

    Pierre