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Graduate
April 15, 2024
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COM update interrrupt is delayed 1.3us

  • April 15, 2024
  • 4 replies
  • 2583 views

Hi,

i am trying to figure out, why this interrupt is delayed that much.

The com trigger comes from timer 1, which works as expected. Also the delay here is as expected too (apart from a 50ns deviation). There is a delay of 1.3us, from the time i can observe, that the com trigger has successfully triggered a loading of the registers in timer 8, to the time i can observe, that the com interrupt of timer8 has been fired.

 

This is my timer 1 interrupt, that preloads the values for CCR2 which causes the com trigger:

 

void TIM1_CC_IRQHandler(){
	GPIOC->BSRR = (uint32_t) GPIO_PIN_3;
	TIM1->CNT = 0;
	unsigned long captValue = TIM1->CCR1;

	lastHallIntervalTics = captValue - lastHallSignalTics;	// calc interval
	lastHallSignalTics = captValue;

	WRITE_REG(TIM1->CCR2, 	NS_TO_TIM1_CLOCK(500));//lastHallIntervalTics));	// Delay value for PWM change trigger
	switchNextState();
}

 

 

This is the com interrupt with PC3 beeing the testsignal:

 

void TIM8_TRG_COM_IRQHandler(){
	GPIOC->BRR = (uint32_t) GPIO_PIN_3;
	TIM8->SR = ~TIM_SR_COMIF;	// DONT send "&=" ReadModifyWrite is bad!
	switchNextState();
}

 

 

Find attached the picture

    This topic has been closed for replies.
    Best answer by Michal Dudka

    If i understood correctly, then you generate rising edge at yellow trace in TIM1_CC_IRQHandler() and falling edge at TIM8_TRG_COM_IRQHandler() yes ? Then you have to check how much time takes TIM1_CC_IRQHandler(). Because if you did not set higher IRQ priority for IM8_TRG_COM_IRQ, then MCU have to finish TIM1_CC_IRQHandler before begin of TIM8_TRG_COM_IRQHandler(). What is your IRQ priority schema ? 

    4 replies

    Graduate II
    April 15, 2024

    MCU type ? SysClock frequency ? Optimization level ?

    TobeAuthor
    Graduate
    April 15, 2024

    Its a G431RBT6 It runs at 170Mhz.

    Opt level is debug

     

    Graduate II
    April 15, 2024

    You clear the CCx interrupt source somewhere?

    What's the prescaler on the TIM ?

    TobeAuthor
    Graduate
    April 15, 2024

    It is cleared by reading CCR1.

    TIM 1 prescaler is 4+1

    TIM 8 prescaler is 0+1

    Super User
    April 15, 2024

    > There is a delay of 1.3us, from the time i can observe, that the com trigger has successfully triggered a loading of the registers in timer 8,

    How exactly do you observed that?

     

    > to the time i can observe, that the com interrupt of timer8 has been fired.

    How exactly do you observed that?

    What do we see on that scope screenshot?

    JW

    TobeAuthor
    Graduate
    April 15, 2024

    On the screenshot you can see:

    Green line: capture input of tim 1

    Yellow line (rising edge): set in capture interrupt of tim 1

    Red line: compare output of tim 8

    Yellow line (falling edge):  set in com interrupt of tim 8

    cursors X1 and X2, that should be close together in my understanding.

    Graduate II
    April 16, 2024

    If i understood correctly, then you generate rising edge at yellow trace in TIM1_CC_IRQHandler() and falling edge at TIM8_TRG_COM_IRQHandler() yes ? Then you have to check how much time takes TIM1_CC_IRQHandler(). Because if you did not set higher IRQ priority for IM8_TRG_COM_IRQ, then MCU have to finish TIM1_CC_IRQHandler before begin of TIM8_TRG_COM_IRQHandler(). What is your IRQ priority schema ? 

    TobeAuthor
    Graduate
    April 16, 2024

    I am not 100% sure, but pretty close to it. It is the preloaded value from an interrupt (tim 1) before. Then the com update happens while in the next interrupt.

    That edge of the red curve really got me confused here.