Configure ADC sampling frequency STM32H723ZG

[elso]

Hi All,

I am using a STM32H723ZG Nucleo board. I am using the ADC in 8-bit mode. The clock is set to 96 MHz, and according to the application note it should use 6 cycles to sample and convert which would result in 16 Msps, but it seems to be between 8 and 9 Msps when measure with oscilloscope. (8.33 Msps) Application note. However I want the frequency to be at 8-bits set to exactly 5 Msps. 

If I would follow the application note:

- frequency set to 30 MHz --> 30/6 = 5 

However I see there are settings as following:

So now I am confused on what settings to configure to get 5 Msps sampling frequency while keeping the CPU clock at 550 MHz. 

Someone knows the best way to make sure the ADC sampling speed can be precisely configured?

Best regards!

[Tinnagit]

you can use timer to trigger ADC sampling to set to 5Msps.

And you should set ADC sampling time + ADC conversion time less than half of period time of each trigger by timer.