Configure AF GPIO register using 11U STM32F446RE

[StanCosgrove]

Hi, i came across a program to config alternation function for SPI GPIO port A. 

GPIOA->CRL |= (11U<<20);       // PA5 SCK AF output push pull

GPIOA->CRL |= (11U<<28);       // PA7 MOSI AF output push pull

What does the 11U means? i know its something like setting the 20th bit to 11? is 11 the binary value for 3? how does the value 3 relates to PA5 SCK and 28 relates to PA7 MOSI ?  Anyone can advise?

[TDK]

11U is an unsigned integer literal, as opposed to an integer literal.

It doesn't do much here, but in some cases where you use all 32 bits you have to make it unsigned. For instance, you can't write 0x80000000 as an int32_t, but you can as a uint32_t.

 

You may also see things like "1234ULL" which would mean it's a (long long unsigned) literal, which can be required if a normal unsigned integer isn't large enough to fit the value.

 

[Piranha]

What does the 11U means? i know its something like setting the 20th bit to 11? is 11 the binary value for 3?

---

No, that is a decimal 11. Learn the C programming language:

https://en.cppreference.com/w/c/language/integer_constant

 

how does the value 3 relates to PA5 SCK and 28 relates to PA7 MOSI ?  Anyone can advise?

---

Reference manual documents all of the registers, bits and their values.

[waclawek.jan]

As others explained, 11U is decimal 11. Without the U suffix, it would be treated as signed, and shifting it so that the result is higher than 2^31-1 (the highest non-negative int32_t) is undefined by standard.

11 decimal is 1011 binary, so if GPIOA->CRL |= (11U<<20); sets the following bits:

other bits remain unaffected. MODE5 will be 0b11, so Output Mode, 50MHz; if the register was zeroed previously, CNF5 will be 0b10 i.e. Alternate Push Pull; if it was at its reset state, then CNF5 will be 0b11 i.e. Alternate Open-drain.

JW

[StanCosgrove]

Hi JW,  thanks for the detailed explanation, i can rationalize with you till 50MHz.... but i dont understand the following : 

"if the register was zeroed previously, CNF5 will be 0b10 i.e. Alternate Push Pull; if it was at its reset state, then CNF5 will be 0b11 i.e. Alternate Open-drain."

why is there 2 possibilities when the instruction 11 decimal --> 1011b, shouldnt CNF5 be only 0b10 ? where does the 0b11 at reset state come from? Pls advise...

[StanCosgrove]

thanks JW, could you kindly advise the datasheet number RM0.... couldnt see clearly, thx...

[StanCosgrove]

i  m reading RM0390 and i guess its not the right one....

[waclawek.jan]

Which STM32 do you use?

Only STM32F1xx have GPIOx_CRL registers.

JW

[StanCosgrove]

STM32F446RE

[waclawek.jan]

Reset value, that is value after reset, of that register is 0x44444444; it means, CNF5=0b01, MODE5=0b00. If you OR that value with 0b1011, CNF5=0b01 OR 0b10 = 0b11; MODE5 = 0b11.

All this is relevant only for 'F1, i.e. irrelevant for 'F446; however, corollary remains, namely that you have to take into account the reset value of register when doing only ORs to set some of the bits.

JW