Connection of JTAG reset and NRST of MCU

[DJ_IND]

Hi,

I am using STM32H753 in my design

Can I short JTAG reset, NRST of MCU and supervisory IC reset ? Will it create any issue while debugging via JTAG interface?

[ELABI.1]

Hi @DJ_IND,

Yes, you can do that, the JTAG can operate without the reset signal, but this may lead to certain limitations. The issue I see is if you need to use the "connect under reset" feature for debugging. This feature is useful to connect to CPU before entering low power mode or run any code. However, if you have short JTAG reset, NRST of MCU, this feature will not be possible. The other point is that when you perform a reset of the MCU, it will reset the JTAG and, consequently, you will then have to reconnect the debugger from the beginning.

Thank you.

ELABI.1

[DJ_IND]

Hi,

 

What exactly 'connect under reset'?  What is the use of that? So, this is only to deal with JTAG reset? JTAG reset will not reset CPU core and still we can access the core under reset? Does it mean this?

[Andrew Neil]

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@DJ_IND wrote:

What exactly 'connect under reset'?  

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This:

It's when the debug probe (ST-Link) uses the hardware reset line to "get the attention" of the target CPU.

This is particularly useful if the debug lines somehow get "locked-out" ...

[Andrew Neil]

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@DJ_IND wrote:

Can I short JTAG reset, NRST of MCU and supervisory IC reset ?

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What supervisor IC ?

It would need to have an open-drain type output ...

[DJ_IND]

Hi,

 

As you see below...

Reset_P is the reset goes to NRST pin of controller. Reset_Sup is supervisory IC reset, considering active high here. We are using three STM32 in our design and I want all 3 to be in reset due to Reset_Sup signal. So I used one MOS switch to do so. Independent switch will be available for all 3 nodes. Apart from that there is manual switch to reset the controller independently. Now as I have connected JTAG reset to NRST (reset_P here) I may not be able to use some specific debugging feature as mentioned above. So I may need to remove JTAG_REset there connect directly to JTAg_reset pin. Hence i will remove OR gate and will connect MR_P to #reset_p direclty. 

Will this work? Have you seen any issue here?

 

 

 

 

 

[DJ_IND]

Hi,

 

Did you get chance to look into this?