Dac -> COMP -> Timer -> DMA -> dual SPI_TX

[pixeltamer]

I've been programming microprocessors for over 40 years and the STM32F301K8 has me stumped.
I'm required to use it in a low budget project with some unusual characteristics.

I need a working example of:
Using STM32CubeIDE and the target STM32F301K8 or STM32F302K8. I have the NUCLEO-F446RE development board to work with and it has the appropriate capabilities for testing. (Pin references below are for the stm32F301)
1) A preset DAC output level is linked to a comparator (minus input PA4), with an external analog input signal to same comparator (positive input PA7).
2) When the comparator output transitions to negative output, a pair of SPIs are to be triggered. The two SPIs (Tx only), each using a DMA output in synchronous parallel. The contents of the buffers act as a 2-bit wide nonblocking & uninterrupted data stream. An interrupt is needed when sending is complete.
3) The SPIs will run at 4MBs, 8-Bit, msb first, no delay between bytes, outputs (PB5 & PA11).
4) A small programmable delay will most likely be needed between when the comparator trips and the SPIs start. Something like a very fast one-shot or PWM (less than 4us).
5) Basically, this routine is independent of the code processor as the output is synced to an external input and must remain synchronous until the buffers are empty.
The code part of the microprocessor will be used to set the DAC level, the delay, and determine what data to put into the contents of the two SPI buffers.

Configuring the individual modules seems to be relatively obvious to me using HAL directives, however tying them together is baffling.
Virtually every USART and SPI example I have found and tried transmits data only once in the DMA modes.

A code snippet showing how it is all tied together would be greatly appreciated.
Can anyone help?

Pixeltamer

[PGump.1]

Hi,

After 40 years, you should know that this will require two DMAs, and you can't get DMAs to operate simultaneously. There is will arbitration, and a winner - so, zero delay between them will be difficult.

One way you could try - one SPI as a master, the other as a slave, link the NSSs and CLKs together - that will sync them...

I hope that helps.

Kind regards
Pedro

[pixeltamer]

Hi,

That could work, someone claims to have done it before, contacting them failed. 

I don't understand the method to the madness.

I can put all of the pieces in place and set their values, and drive them individually from simple code, and that is fairly easy. 

I'm not used to the 32bit processor in this scope and have used it a few times for more mundane processes.

The method of tying the pieces together outside of the inline code process is not well understood by me.

Perhaps there is a more advanced teaching aid beyond "Hello World", which I've done hundreds of times on many processors and FPGAs. 

I've downloaded the Spec sheet, the "UM1940 User manual", and "RM0316 Reference manual", and scanned much of them. They read like a reference guide to the designer, who already has intimate knowledge of the inner workings, something I don't yet have. The numbers are there, but the process is either not there or I missed it.

This is why I asked for a working example, perhaps hoping for the ahh-ha moment where it all falls into place.  

Thanks,

Pixeltamer

 

[PGump.1]

Hi,

I've never had an 'ahh-ha' moment when copying someone else's work.

Although, I must admit - R&D is not for everyone...

Kind regards
Pedro