Design of PCB with SDIO and USB (STM32F411CEU6)
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Hi!
I would like to ask the community if my design of the SDIO and USB bus looks fine. Previously, I was using a dev board (BlackPill STM32) to write data to an SD card, but I encountered some issues during the communication stage. The problem occurs when the SDIO protocol starts sending data at a 24 MHz frequency. When I try to write or read a block of data in common mode, without DMA and interrupt handling (IT), I always get a HAL_TIMEOUT error.
After researching the issue, I found that some people suggest it might be caused by incorrect SDIO bus design, specifically related to impedance and trace length control.
To address this, I redesigned the PCB. It now consists of four layers, with the top and bottom as signal layers, and the two middle layers as GND and VCC (which are not shown in the design). I hope you can review it and provide some feedback, whether positive or negative.
I have tried several variations of the code and tested it on another board (STM32 BlackBoard with an SD slot), where it works but only with a 10x SDIO_CK divider or higher. This fact also leads me to conclude that the initial design (BlackPill) used a chip SD adapter with an undefined wire length and impedances. Furthermore, I later discovered that the second design (BlackBoard) also had a few mistakes,like weird trace path through 2.54 contact row.



