Does STM32H56xx 1MB device has extra memory for high-cycle data?

[Snaku]

Hi,

I have this question because the reference manual states:
“When flash high-cycle data area on Bank1 is enabled, the code memory map is not continuous from Bank1 to Bank2 on 2M- and 512K-byte devices.”

So, does this mean that enabling high-cycle data sectors as EDATA on a 1MB device does not affect the code memory space, while on 2MB and 512KB devices, some sectors are reassigned for EDATA usage? If that’s the case, it seems like the 1MB device effectively has an extra 96KB of high-cycle data memory.

Snaku

[mƎALLEm]

Hello,

Enabling EDATA on 1MB, 2MB, and 512KB devices always reduces the available code memory, as the high-cycle data area is mapped to the last sectors of the flash.
The 1MB device does not gain "extra" high-cycle data memory; the 96KB is part of the existing flash, not additional.

When you enable the high-cycle data area (EDATA) on a 1MB STM32 device, the code memory map becomes non-continuous between Bank1 and Bank2. The high-cycle data area is mapped to the last sectors of Bank1 and Bank2, which reduces the available code memory. The 96KB high-cycle data memory is not an "extra", it is part of the existing flash memory that is repurposed for high-cycle data storage when EDATA is enabled. This behavior is consistent with 2MB and 512KB devices.

From the RM0481:

 

[Snaku]

Hi mƎALLEm,

Thanks for your reply.
Base on your description, if I set the EDATA1_EN = 1, and DEATA1_START = 0 on a 1MB device, then the sector 63 will be map to sector 127, so the code memory space become discontinue because the sector 63 is not avaiable. Is my understanding correct?