Does the ADC single-ended input mode in STM32H753ZITK allow the negative input signal?

[RongShengWang]

Hi,

   The reference manual says -

      "In differential input mode, the analog voltage to be converted for channel “i” is the difference
between the external voltage VINP[i] (positive input) and VINN[i] (negative input".

    "In single-ended input mode, the analog voltage to be converted for channel “i” is the difference between the external voltage VINP[i] (positive input) and VREF- (negative input)." - however VREF- is a fixed value.

     Does the ADC single-ended input mode in STM32H753ZITK allow the negative input signal? 

Thanks

 

   

 

[Ozone]

> Does the ADC single-ended input mode in STM32H753ZITK allow the negative input signal? 

No.
No STM32 allows negative input voltages, i.e. negative in respect the GND.
If not elsewhere, this is explicitely mentioned in the datasheet, "maximal ratings", and the ADC section.

This differential mode means that VINN can be a "negative" potential in respect to VINP, which is probably reflected in the converted value (haven't tried that out myself yet).

For actual negative voltages, you could use an opamp stage to amplify and shift the signal, or an external ADC with truly differential inputs.

[RongShengWang]

 The datasheets (STM32H753ZI) says (P173) - "the VREF– s available only on UFBGA176+25 and
TFBGA240+25" 

It shows the negative input exists in UFBGA176+25 and TFBGA240+25" . 

It contradicts what your reply. Could you ask ST Support? 

Thanks,

 

 

[Ozone]

I don't have a H7 device, and thus not yet worked through the datasheet & reference manual.
Although it would be possible, I find it implausible. This would require a negative supply voltage - or internal generation of a negative supply voltage. And I don't think the rare use cases would make this an economic choice.

> Could you ask ST Support? 

I am not affiliated with ST, just a common user - and thus not privileged.
Questions by yourself should have the same weight.
But perhaps a ST employee can clarify things.

Until then, I go with the following:

With VSSA being the ground pin for the analog section. Having separate VSS and VSSA pins (and VDD / VDDA) is purely for EMI resistance.

 

[RongShengWang]

As you said, I need ST support engineer to answer my question - Please let ST support engineer to answer my question

The datasheets (STM32H753ZI) says (P173) - "the VREF– s available only on UFBGA176+25 and
TFBGA240+25" 

It shows the negative input exists in UFBGA176+25 and TFBGA240+25 packages" . 

 Also the reference manual says -

      "In differential input mode, the analog voltage to be converted for channel “i” is the difference
between the external voltage VINP[i] (positive input) and VINN[i] (negative input").

    "In single-ended input mode, the analog voltage to be converted for channel “i” is the difference between the external voltage VINP[i] (positive input) and VREF- (negative input)." - however VREF- is a fixed value.

      In the differential mode, it does allow the negative inputs.

        Does the ADC single-ended input mode in STM32H753ZITK allow the negative input signal?