Error in STM32G4 reference manual RM0440, revision 7 (February 2022), section 44.3.3 Message RAM of FDCAN peripheral

[VMich.1]

Figure 669. Message RAM configuration clearly shows that the message RAM is 0x350 bytes long which corresponds to 212 32-bit words. But later the following example is used to show, how the message RAM of FDCAN2 follows message RAM for FDCAN1:

As an example, for two instances:

• FDCAN1:

– start address 0x0000

– end address 0x0350 (as in Figure 669)

• FDCAN2:

– start address = 0x0350 (FDCAN1 end address) + 4 = 0x0354

– end address = 0x0354 (FDCAN2 start address) + 0x0350 - 4 = 0x06A0.

Addresses for FDCAN2 are clearly incorrect since this calculation (0x6A0 - 0x354 = 34C) would mean that FDCAN has only 0x34C bytes instead of 0x350.

Can you please clearly list base addresses of each peripheral's message RAM?

[Imen.D]

Hello @Vojtěch Michal​ and welcome to the Community :)

Thank you for having reported the point.

I have passed your feedback internally for review and fix.

Internal ticket number 123624 is submitted (This is an internal tracking number and is not accessible or usable by customers).

Thanks

Imen

[Imen.D]

Hello @VMich.1 

This issue is fixed in the latest release of RM0440.

Thank you for your contribution.