FDCAN interrupt lines in the manual...

[Tobe]

I got a hard time comprehending about the two interrupt lines in the manual.

I can really see a "connection" between certain sources to the interrupt lines, nor can i find a register to connect them.

It seems to me, that i only can decide what interrupts will fire, and what interrupt line they will go to then. But i cant think of, how i could have both interrupt lines running in paralell.

I think i missed something.

Is there a better information about this out there?

[serioussam]

Absolutely, something wrong with documentation, RM0440 particularly.

Documentation became much worse with new series of microcontrollers, pushing developer to use HAL library only.

There are no even a "tree" of interrupts connection, like it was for STM32F407, for example.
Futhermore there are no any intelligible explanation in documents (STM32H7xx Reference Manual which has similar FDCAN module, User manuals, App Notes etc., etc.).

[Tobe]

It is really a sad development, as HAL is a big and ugly beast. Im so glad i do this without any pressure as a hobby. But maybe one day i will find a job as a technical documentation interpreter for STM32 products ;-).

[elKarro]

Hi Tobe, I'm puzzled too.
From the auto-generated stm32g4xx_it.c :

void FDCAN1_IT0_IRQHandler(void) {HAL_FDCAN_IRQHandler(&hfdcan1);}
void FDCAN1_IT1_IRQHandler(void) {HAL_FDCAN_IRQHandler(&hfdcan1);}

and HAL_FDCAN_IRQHandler() doesn't care about the caller.

So, the reason to justify the presence of the two identical NVIC slots FDCAN1_IT0/FDCAN1_IT1 could be an unexplicit workaround to a silicon bug.

FDCAN interrupt register (FDCAN_IR) says:
The flags are set when one of the listed conditions is detected (edge-sensitive).

Since they're not level-sensitive, perhaps they can be lost under certain circumstances while serving an handler.
By doubling the handler, they will be intercepted by the other on the exit from the previous.
I'm not sure of that, but is the only explanation I see.

[elKarro]

Nevermind my previous reply.
After digging into HAL sources I can summarize:

The interrupt sources in the register FDCAN.IE are grouped into 7 source groups in the register FDCAN.ILS.

The register FDCAN.ILE allows to enable 2 different interrupt lines: EINT0 and EINT1;
any of the 7 groups in the register FDCAN.ILS can be redirected to only 1 of the 2 lines EINT0/EINT1.
According to the function HAL_FDCAN_ConfigInterruptLines() and HAL_FDCAN_ActivateNotification():

- by setting FDCAN.ILE.EINT0 = 1, every source group in FDCAN.ILS which has its bit == 0 will be redirected to EINT0 and handled by FDCAN_IT0_IRQHandler() if any of its sources is enabled in FDCAN.IE;
- by setting FDCAN.ILE.EINT1 = 1, every source group in FDCAN.ILS which has its bit == 1 will be redirected to EINT1 and handled by FDCAN_IT1_IRQHandler() if any of its sources is enabled in FDCAN.IE.

 

Special thanks to ST for the exhaustive documentation.

[serioussam]

Oh, it's great that you clarified that.
I will try this question as I need to return to this work after a long break.

I remember that I could not be able to run Interrupts on two lines. As I understand that i can to redirect some interrupt groups to first line and another to second line ? It's great.

It's too bad that this is poorly described in the documentation.

[mƎALLEm]

Hi All,

A knowledge base article has been published today regarding this subject: 

Understanding FDCAN interrupts grouping in applicable STM32 MCUs with an example

Enjoy your reading ..