See DS13560 Rev 4 (Datasheet of STM32G0B1RE)please. On the right side, it said "Six USARTs with master/slave synchronous SPI; three supporting ISO7816 interface, LIN, IrDA capability, auto baud rate detection and wakeup feature". I'm now writing courseware for my students and i cannot explain what is "USART with SPI", seems to not be "Serial peripheral interface".
Well that's a bit scary..
With the U(S)ART, the S means Synchronous, ie with a clock. ST's implementation, unlike some from yore, has a single clock output (input in Slave mode), so both TX and RX come via the same clock, isn't that adequate to meet the definition of a serial peripheral interface, in the broad definition of the concept? An SPI EEPROM, probably not, but the world of choices is somewhat larger than that.
Here signalling and framing is used, rather than a chip select.
Not going to work well where the interface expects independent clocks, or probably SDLC / HDLC either.
And not as remotely helpful as Atmel/Microchip's SERCOM model.
ST's model is more "Imagine the possibilities", and perhaps the ability to disabuse the peripheral to achieve what you need, especially with legacy or non-conforming hardware.
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