Fixing LTDC Glitch by setting bit READ_ISS_OVERRIDE in AXI_TARGx_FN_MOD_ISS_BM
Hi,
My problem is solved but I need an explanation on the solution I found.
Context
I am using a custom board equiped with a STM32H7, an external SDRAM connected by FMC and a LCD screen drived by LTDC :
Issue
The UI is managed by TouchGFX using Double Buffering at 60 fps. Everything works fine for still screens. However, when an animation is displayed (Like a scrolling text, updated frequently), the display shows glitchs.
It seems the first 5% of rows are displayed correctly, then the rest is randomly shifted to the right.
Hypothesis
I suppose the glitch appears when the other framebuffer is updated in External SDRAM. The write operations from DMA2D bother the read operations from LTDC.
Solution
I started to look at the AXI Interconnect module to configure a Higher Read QoS (Quality of Service) for the LTDC master (Register AXI_INIx_READ_QOS). This didn't change anything.
I then set the bit READ_ISS_OVERRIDE in the register AXI_TARGx_FN_MOD_ISS_BM for the TARGET_5 (FMC peripheral) and it solved the situation. No more glitch.
Question
The reference manual is not really verbose about this bit and what it does. I would like to know more about it in order to understand the consequences for the other of the masters reading and writing through FMC.