FMC SDRAM common clock description mismatch between CubeIDE and RM0433

[gabrielgcma]

I want to set up 100MHz for SDRAM.

STM32CubeIDE version 1.18.1 has the following options for SDRAM clock:

The selected board is the STM32H743IITx. 

RM0433 Rev 8 states that:

I'm not sure HCLK and fmc_ker_ck are the same thing.

If I have my FMC clock set up as:

And select HCLK/2, I'll have 100MHz for the SDRAM? Or is HCKL system clock?

 

[TDK]

> And select HCLK/2, I'll have 100MHz for the SDRAM?

Short answer: yes.

 

HCLK means fmc_ker_ck here.

 

If you go through HAL to see what the setting affects, you see it affects this field:

 

Do a search for fmc_ker_ck and you see where that's from. For you, it's PLL2R.