FMC to connect external SDRAM. Do I need length or impedance matching?

[DavidL_]

It's my first time on a project where I need to consider "high-speed" signals, I read up on it but I am not entirely sure if I even need impedance or length matching here.

I want to add external SDRAM to my stm32H7A3ZI MCU running at up to 280MHz via the FMC, which from my understanding has a rise time of: 0.35/(ClockSpeed/2) so around 2.5ns. I understand that the trace length is important, so I am going to try keeping the SDRAM ~2cm away from the MCU.

I would follow the following recommendations:
- Use a 4 or 6 layer PCB where the trace of the FMC are on a layer right below or above a "pure" GND layer
- Use consistent trace width
- Trace spacing of at least 12mils
- No 90° corners

Do I need to consider anything else while creating this?

[STOne-32]

Dear @DavidL_ ,

This application Note on Simulation with our IBIS model may help you as well : https://www.st.com/resource/en/application_note/an4803-highspeed-si-simulations-using-ibis-and-boardlevel-simulations-using-hyperlynx-si-on-stm32-mcus-and-mpus-stmicroelectronics.pdf

you can see example of SDRAM in chapter 5 (  with STM32F7xx ) but very similar to STM32H7A where SDRAM frequency is about 100MHz . Particular attention to Clock signal impedance matching with receiver ( Memory) and  all data should be with same length Matching.

Hope it helps you ,

STOne-32