Getting possible error of FLASH write operation

[Tobe]

I need to check to outcome of a FLASH write operation. EOP would indicate, that it was successfully, but it needs the interrrupt to be enabled to show the outcome. Oh well, then i use the error flag instead (because i dont want to use interrupts). But then AGAIN it needs an interrupt enabled to work. Why cant there be just a simple flag without needing of other things???

 

[waclawek.jan]

You don't need to enable the FLASH interrupt at NVIC level, so no actual interrupts will be fired.

> Why cant there be just a simple flag without needing of other things???

Good question. I'd love to hear the author of this module to comment, but that won't happen.

JW

[Tobe]

But then the flag is not set.

 

[waclawek.jan]

The description you pointed out does not call for interrupts to be enabled at NVIC, only the enable bits in FLASH_CR to be set.

Are you saying you have a different experience? That you did not enable interrupts in NVIC, set FLASH_CR.EOPIE/ERRIE, yet still seen no EOP/ERR being set in FLASH_SR?

JW

[Tobe]

I debugged it... no flag to see. But i must say, that i did not erase the page. I read somewhere, that writing 0x00 is still possible. It works on the first double word, but not after it.

[waclawek.jan]

You haven't set FLASH_CR.EOPIE/ERRIE. So, exactly as documented, neither FLASH_SR.EOP nor xxERR is set.

Set FLASH_CR.EOPIE/ERRIE and retry. As long as you don't enable FLASH interrupt in NVIC, interrupt service routine is not run.

JW

[Tobe]

I dont think that i want to disable interrrupts, as i use two of them. But on the other hand, im thinking if i should  disable interrupts when writing to flash?

[Pavel A.]

To check for flash write outcome (besides of the error flags): compare the source and the flash content. Because, things happen.

 

[Tobe]

It might be an idea, because the documentation is kinda useless. I now got a flag of success and two flags of failure at the same time... Errors were cleared just before!

[waclawek.jan]

There are three levels at which you enable/disable interrupts

1. individual interrupt sources within a peripheral (e.g. in timer, you enable/disable them by setting bits in TIMx_DIER);

2. then all enabled interrupts of one peripheral are ORed together and output of that OR is one of the inputs to NVIC, other inputs are from other peripherals;

all these can be individually disabled (they are by default) or enabled (e.g. using NVIC_EnableIRQ() )

3. in processor, interrupts can be enabled/disabled globally (using __enable_irq()/__disable_irq()); when disabled globally, none of the peripherals enabled in NVIC causes interrupt

 

Here, I am not talking about disabling interrupts globally (3.). I am talking about not enabling (i.e. leaving in default disabled state) the particular FLASH interrupt at NVIC level (2), so that even if you enable interrupts at the FLASH module level (1), no interrupts from FLASH will reach processor (as they are disabled at NVIC level (2)), while other interrupts are still enabled.

JW

[Piranha]

This is just nonsense. If the code doesn't use FLASH interrupts, the bits EOP and OPERR are not even necessary. The code must poll the BSY flag, which indicates a program/erase completion, and after that read all the other actual error flags, which also inform about the specific reason for failure. If no error flags are set, then the operation was successful. All of the error flags must be cleared at the beginning, otherwise the program/erase operations doesn't even start. Again, all of it is described in the reference manual - it even shows the exact programming sequences for the software developer.