Skip to main content
Graduate II
October 15, 2024
Solved

H7x3 SAI with DMA in MONO mode

  • October 15, 2024
  • 7 replies
  • 2308 views

Heyho,

using all SAI blocks on H723 / H733 / H735 with stereo audio ADCs via DMA, working smoothly as long as both channels are used.

Now I wanted to implement turning off single channels, and I thought I could do that with the SAI / DMA settings.

I just found the MONO mode & bit and its limitations (RM0468 Rev 3, page 2304):

So only slot 0 (channel 1 of stereo ADC, or in audio terms: LEFT channel) can be used. (This is terrible!)

As far as I understand, the settings in register SLOTR stay the same as for stereo mode (NBSLOT = 1 and SLOTEN = 3).

DMA buffer length is set to half the stereo length.

Problem:

I still see data of channel 2 in the DMA buffer, it's changing all the time: sometimes channel 1 data only, sometimes stereo data (with the usual channel multiplexing, samples: c1 c2 c1 c2 c1 ...).

Anybody any ideas?

Thanks in advance!

    This topic has been closed for replies.
    Best answer by LCE

    Correction:

    the above is true - but not necessary.

    Sometimes, just don't believe the RM...

    LCE_0-1728996869576.png

    That part is wrong, slot 0 is stored only if slot 0 is enabled (as proposed on the previous page).

    If SLOTEN in SLOTR is set to 2 (slot 1 is enabled) and MONO bit is set, luckily slot 1 (= 2nd / R channel of stereo) data is given to DMA.

    No FSPOL shenanigans needed! :)

    7 replies

    LCEAuthor
    Graduate II
    October 15, 2024

    It doesn't matter which SAI block is used, SAI 1 A or B or SAI 4 A or B, always the same result.

    Super User
    October 15, 2024

    Hi,

    i think, you cannot do it this way, because ADC always sending standard L-R-L-R... - you have to set the SAI to this.

    If you dont want stereo, but just one channel: why not simply copy only L or R samples from the circular buffer ?

    You get, what you want and the SAI runs on the format, the ADC is sending.

     

    LCEAuthor
    Graduate II
    October 15, 2024

    Hi AScha.3,

    copying is no option.

    The system is based on DMA transfers in the background - what is absolutely necessary with max. 8 channels at 32 bit / 200 kHz.

    At least I found a big bug in switching DMA buffers in DBM mode.

    Now I get the 1st of the 2 stereo channels cleanly with the MONO bit.

    Maybe I can do some LRCK polarity switching to get channel 2.

    LCEAuthor
    Graduate II
    October 15, 2024

    So, for the non-master SAI blocks, I can simply switch the FSPOL bit in FRCR to get the 2nd channel in MONO.

    But - as expected - I must not do that with the SAI clock master, because then all other stereo channels get switched (L becomes R, R becomes L).

    I mean, I could do that, but our software guys would kill me... :D

    Conclusion:

    - the SAI clock master's channel 1 (or left) must always be turned on (channel 2 / R can be turned off)

    - for the SAIs working as clock slaves, the FSPOL bit must be inverted to get only channel 2 / R

    LCEAuthorAnswer
    Graduate II
    October 15, 2024

    Correction:

    the above is true - but not necessary.

    Sometimes, just don't believe the RM...

    LCE_0-1728996869576.png

    That part is wrong, slot 0 is stored only if slot 0 is enabled (as proposed on the previous page).

    If SLOTEN in SLOTR is set to 2 (slot 1 is enabled) and MONO bit is set, luckily slot 1 (= 2nd / R channel of stereo) data is given to DMA.

    No FSPOL shenanigans needed! :)

    LCEAuthor
    Graduate II
    October 15, 2024

    Anyway, I would feel safer if someone else can confirm that, maybe some SAI expert from ST ?

    LCEAuthor
    Graduate II
    October 16, 2024

    Could you please check that, maybe @STOne-32 or @KDJEM.1 ?