Heap 5 for discontiguous ram, RTOS hard faulting

[STMGuitartune68]

I am currently using a FreeRTOS example project with the stmwL55, but instead of the defaulted heap 4, I am selected heap 5 in the ioc to utilize RAM2 for the 28kb. I have used the suggested example of how to initialize the heap before task creation.

 

HeapRegion_t xHeapRegions[] =
 {
 	{ ( uint8_t * ) 0x20000000UL, 32768 }, //<< Defines a block of 0x8000 bytes starting at address 0x20000000
 	{ ( uint8_t * ) 0x20009000UL, 20480 }, //<< Defines a block of 0x4000 bytes starting at address of 0x20009000
 	{ NULL, 0 } //<< Terminates the array.
 };

 

However, the program hard faults when the program gets to prvPortStartFirstTask(). The build analyzer shows that my RAM1 only has 50% usage and RAM2 is at 0% so I am not sure what else I have to do for my memory to actually be used.

[Pavel A.]

Where is your main (aka interrupt) stack? Data, BSS memory? Is by chance the address 0x20000000 collide with these?

 

[STMGuitartune68]

This is the memory details. however even if I have the starting address as 0x20003650, The build analyser still does not show the change ram1 in usage and I do not know how use ram2 for usage. Is there a function for enabling ram2 or is there something else I'm doing wrong?

[Pavel A.]

So your .data begins from 0x20000000 and at the same address you place the heap. Seriously? 

No need to "enable" RAM2. The linker does not know that you use it. This is ok.

 

[Patrice LF]

Hi,

Does your setup satisfy the SRAM2 access rules detailed in Table.3 of RM0453 ?

Regards

Patrice

[STMGuitartune68]

Hey Patrice,

I looked at table 3 and was wondering where I would check if the sram is set to execute never. I am also still confused as to why ram1 is not used when I defined space for in the heap structure.

 

Thanks