@DZado.2 wrote:
I did two changes:
1) I removed the lines (as gbm proposed):
//LL_GPIO_SetAFPin_8_15(GPIOA,LL_GPIO_PIN_15,LL_GPIO_AF_5);
//LL_GPIO_SetPinMode(GPIOA,LL_GPIO_PIN_15,LL_GPIO_MODE_OUTPUT);
1) And I added
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
in addition to
__HAL_RCC_GPIOA_CLK_ENABLE();
Now it is working. I have no clue why.
If I remove LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA), it does not work.
Would you please explain why?
I'm not sure? The LL and HAL are setting the same register/bit, though the LL is static inline
Look at the disassembly to see what each is doing.
// HAL
#define __HAL_RCC_GPIOA_CLK_ENABLE() do { \
__IO uint32_t tmpreg; \
SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \
/* Delay after an RCC peripheral clock enabling */ \
tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \
UNUSED(tmpreg); \
} while(0)
// LL
#define LL_AHB2_GRP1_PERIPH_GPIOA RCC_AHB2ENR_GPIOAEN
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
__STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs)
{
__IO uint32_t tmpreg;
SET_BIT(RCC->AHB2ENR, Periphs);
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHB2ENR, Periphs);
(void)tmpreg;
}