How to design an USB OTG interface
Hello everyone,
After several hours of searching, I haven't found a working example of an electronic schematic for interfacing a USB OTG port with an STM32 F7.
Furthermore, the documentation provided "AN4869 Rev6" by ST is not clear enough to produce a schematic.
With the help of various links and documents I have tried to produce a schematic:
- https://community.st.com/t5/stm32-mcus-products/problem-with-usb-otg-in-host-mode-no-host-user-class-active/td-p/572407
- https://community.st.com/t5/stm32-mcus-products/problem-with-usb-otg-fs-device/td-p/622824
- NUCLEO-144pins_Altium_Schematics-Layout : MB1137.pdf : page 4
- https://controllerstech.com/usb-cdc-device-and-host-in-stm32/
- AN4869 Rev6
The basis comes from AN4869 page 16:

My schematic (2 PCBs linked by a small MOLEX type cable in blue):

In general I would like to know if this schematic is functional and correct.
More precisely:
- C24 = 4.7uF but it says "MAX". Is it more appropriate to use 1uF?
- Certain example adds a 1.5k ohms resistor on DP, is this necessary?
- Is R8 = 47k ohms useful, given that there's already "- VCC3->R5->D1 -"?
- For the "EN" input of the STMPS2151STR there's a pull-down R4 = 10k ohms but on some examples it's a pull-up, what's the right solution?
- Are the 2 resistors R1, R2 = 22 ohms essential for impedance matching?
- Is the FB1 ferrite really necessary, and won't it interfere with the VBUS?
- Apart from enabling USB OTG in STM32CubeIDE, is there any special configuration required for USB_OTG_VBUS?

Thank you in advance for your help.
best regards



