How to drive SPI MOSI to a certain logical level at all time including SPI bus not active

[Yang Yang]

Hello, ST experts

 

It seems that SPI_MOSI on STM32F407 does not show a certain level. So it is vulnerable by other sources. Is that a register bit like SPI_MASTER_KEEP_IO_STATE_ENABLE on STM32U595? So that MOSI can keep a certain level.

 

Best Regards

Yang

[Ozone]

> It seems that SPI_MOSI on STM32F407 does not show a certain level. 

How did you arrive at that conclusion ?
It works fine for me.

I suggest to share the relevant part of the schematics, and the init code for SPI.

[Yang Yang]

Hello, Ozone

 

I  mean the MOSI pin is float when SPI bus is not active. I found that by seeing some glitches on spi_mosi when spi_sclk rise or fall(I think that is cross-interference). And some experiments have been done for this case. When SPI is set to 2Linex_RX_Only, there are no glitches on mosi pin when sclk changes.

 

By the way, SPI peripheral works well in our design except that there are some glitches on spi_mosi pin.

 

BR

Yang

[Ozone]

Checking the F40x reference manual, I can't find any reference defining the state when SPI is inactive.
I use to have external pull-up resistorson those pins, and serial resistors for applications like SD cards.

The Wiki page suggests data lines are tristate (floating) when inactive:

https://en.wikipedia.org/wiki/Serial_Peripheral_Interface

 

[CTapp.1]

Are you using CubeMX to configure the hardware?

I've got an STM32G4 project, and the SPI configuration in MX allows me to add a pull-up or pull-down to the SCK, MOSI and MISO signals.

[Yang Yang]

Hello

 

Yes I am using CubeMX to generate the code framework. Thanks for your advise, I can add pull-up or pull-down directly in stm32f4xx_hal_msp.c. I will have try too.

 

BR

Yang